Intel Corporation

Ruchika Singh

Paul S Diefenbaugh

Rita Chattopadhyay

Francesc Guim Bernat

Barnes Cooper

Hassnaa Moustafa

Inder M Sodhi

Andrew D Henroid

Faraz A Siddiqi

Sangeeta Ghangam Manepalli

Siew Wen Chin

Michael Calyer

Mandar Chincholkar

A robot including a resource sharing circuit, configured to operate according to a resource utilization limit, and comprising a processor, configured to receive resource data representing a resource utilization of the robot; if the resource utilization of the robot is within a predetermined range, operate according to a first operational mode, wherein an upper limit of the predetermined range is defined by a tolerance relative to the resource utilization limit; if the resource utilization of the robot is outside of the predetermined range, operate according to a second operational mode; wherein the first operational mode includes controlling a communication circuit to send a first wireless signal representing an availability to accept a task; and wherein the second operational mode includes controlling the communication circuit to send a second wireless signal representing an availability to allocate a task to an external device for remote processing.

Autonomous mobile robot scaling

Various aspects of techniques, systems, and use cases include provide instructions for operating an autonomous mobile robot (AMR). A technique may include capturing audio or video data using a sensor of the AMR, performing a classification of the audio or video data using a trained classifier, and identifying a coordinate of an environmental map corresponding to a location of the audio or video data. The technique may include updating the environmental map to include the classification as metadata corresponding to the coordinate. The technique may include communicating the updated environmental map to an edge device.

Scene intelligence for collaborative semantic mapping with mobile robots

In an embodiment, a processor includes a plurality of cores to independently execute instructions, at least one graphics engine to independently execute graphics instructions, and a power controller including a duty cycle logic to set a duty cycle having a cycle time formed of an active time window in which at least some of the plurality of cores are to be active and an idle time window in which the plurality of cores are to be in a low power state. The duty cycle logic may adjust a duration of at least one of an active time window and an inactive time window based on interrupt information to accommodate an impending interrupt within the active time window. Other embodiments are described and claimed.

Self-aligning a processor duty cycle with interrupts

In an embodiment, a processor includes a plurality of cores to independently execute instructions, at least one graphics engine to independently execute graphics instructions, and a power controller including an alignment logic to cause at least one workload to be executed on a first core to be rescheduled to a different time to enable the plurality of cores to be active during an active time window and to be in a low power state during an idle time window. Other embodiments are described and claimed.

Rescheduling workloads to enforce and maintain a duty cycle

Growing community of inventors

Portland, OR, United States of America

Ruchika Singh