Intersil Americas Inc.

Renesas Electronics America Inc.

Microsoft Technology Licensing, LLC

Ruchi Parikh

Rhys S A Philbrick

Rhys Philbrick

Weihong Qiu

Chun Cheung

Gwilym Francis Luff

Julian Arlo Binder

Zhixiang Liang

Eugene Lvovich Shoykhet

Emil Chen

Marc E Dagan

Daniel Chian

Seenu Gopalraju

In an embodiment, an amplifier includes first, second, and third stages, and a feedback network. The first stage has a first passband and is configured to generate a first output signal in response to first and second input signals, and the second stage has a second passband that is higher in frequency than the first passband and is configured to generate a second output signal in response to third and fourth input signals. The third stage has a first input node coupled to receive the first output signal, a second input node coupled to receive the second output signal, and an output node. And the feedback network is coupled between the second input node and the output node of the third stage. For example, where the first, second, and third stages are respective operational-transconductance-amplifier stages, such an amplifier may be suitable for low-power applications.

Multi-stage amplifier

In an embodiment, a power-supply controller includes a switching regulator and a current limiter. The switching regulator is configured to generate an input current such that an output voltage is generated in response to the input current and an input voltage, and the current limiter is configured to limit the input current in response to a quantity that is related to a ratio of the output voltage divided by the input voltage. For example, an embodiment of such a power-supply controller may be able to limit the output or load current from a power supply to a set level by limiting the input current in response to a quantity that is related to the ratio (e.g., the boost ratio) of the output voltage to the input voltage.

Limiting a current

A system and method capable of injection locking the phases of a peak-valley multiphase regulator includes comparing an output voltage error signal with a ramp control signal and providing a corresponding slope reset signal, using transitions of the slope reset signal to develop a equally spaced high side ramp signals and equally spaced low side ramp signals, and injecting a corresponding one of the high side signals and a corresponding one of the low side ramp signals into each of the phases which correspondingly develop equally spaced pulse control signals for multiphase operation. Such injection locking allows the additional phases to operate out of phase with the first phase and allows operation at high duty cycles.

Injection locked phasing for a peak-valley multiphase regulator

A modulator configured to control switching of current through an inductor of a converter according to a current limiting scheme while converting an input voltage to an output voltage, which includes a current limit generator and a comparator network. The current limit generator is configured to provide a periodic ramping current limit value based on either the input voltage or the output voltage, an inductance of the inductor, a timing signal, and a predetermined maximum output current of the boost converter. The comparator network is configured to provide a switch control signal to control switching of current through the inductor by comparing a current sense value indicative of a current through the inductor with a lesser of a compensation error value and the periodic ramping current limit value. The converter may be configured as a peak current mode control converter in either boost or buck mode.

Current limiting scheme for a converter

An equivalent series inductance (ESL) cancel circuit for a regulator for adjusting a feedback voltage by attenuating a magnitude of a square wave ripple voltage developed on an output voltage. The regulator includes an output inductor and an output capacitor, in which the capacitor has an ESL which forms an inductive voltage divider with the output inductor causing the square wave voltage ripple. The ESL cancel circuit may include first and second current sources and a resistor device coupled between the output node and an adjust node which is further coupled to a feedback input of the regulator. The first current source applies a current proportional to the output voltage to the adjust node. The second current source selectively applies a current proportional to the input voltage of the regulator based on a state of the pulse control signal.

System and method of equivalent series inductance cancellation

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Mountain View, CA, United States of America

Ruchi Parikh