Unity Semiconductor Corporation

Hefei Reliance Memory Limited

Roy Lambertson

Lawrence Schloss

Wayne I Kinney

Christophe J Chevallier

Darrell Rinerson

Edmond R Ward

John Espinoza Sanchez, Jr

Julie Casperson Brewer

Philip Swab

Rene Meyer

A memory using mixed valence conductive oxides is disclosed. The memory includes a mixed valence conductive oxide that is less conductive in its oxygen deficient state and a mixed electronic ionic conductor that is an electrolyte to oxygen and promotes an electric filed to cause oxygen ionic motion.

Two-terminal reversibly switchable memory device

A memory using mixed valence conductive oxides is disclosed. The memory includes a mixed valence conductive oxide that is less conductive in its oxygen deficient state and a mixed electronic ionic conductor that is an electrolyte to oxygen and promotes an electric field effective to cause oxygen ionic motion.

A two-terminal memory cell including a Schottky metal-semiconductor contact as a selection device (SD) allows selection of two-terminal cross-point memory array operating voltages that eliminate 'half-select leakage current' problems present when other types of non-ohmic devices are used. The SD structure can comprise a 'metal/oxide semiconductor/metal' or a &#x201c;metal/lightly-doped single layer polycrystalline silicon.&#x201d; The memory cell can include a two-terminal memory element including at least one conductive oxide layer (e.g., a conductive metal oxide&#x2014;CMO, such as a perovskite or a conductive binary oxide) and an electronically insulating layer (e.g., yttria-stabilized zirconia&#x2014;YSZ) in contact with the CMO. The SD can be included in the memory cell and configured electrically in series with the memory element. The memory cell can be positioned in a two-terminal cross-point array between a pair of conductive array lines (e.g., a bit line and a word line) across which voltages for data operations are applied.

Array operation using a schottky diode as a non-ohmic selection device

An ion barrier layer made from a dielectric material in contact with an electronically insulating layer is operative to prevent mobile ions transported into the electronically insulating layer from passing through the ion barrier layer and into adjacent layers during data operations on a non-volatile memory cell. A conductive oxide layer in contact with the electronically insulating layer is the source of the mobile ions. A programming data operation is operative to transport a portion of the mobile ions into the electronically insulating layer and an erase data operation is operative to transport the mobile ions back into the conductive oxide layer. When the portion is positioned in the electronically insulating layer the memory cell stores data as a programmed conductivity profile and when a substantial majority of the mobile ions are positioned in the conductive oxide layer the memory cell stores data as an erased conductivity profile.

Non-volatile memory device ion barrier

A threshold device including a plurality of adjacent tunnel barrier layers that are in contact with one another and are made from a plurality of different dielectric materials is disclosed. A memory plug having first and second terminals includes, electrically in series with the first and second terminals, the threshold device and a memory element that stores data as a plurality of conductivity profiles. The threshold device is operative to impart a characteristic I-V curve that defines current flow through the memory element as a function of applied voltage across the terminals during data operations. The threshold device substantially reduces or eliminates current flow through half-selected or un-selected memory plugs and allows a sufficient magnitude of current to flow through memory plugs that are selected for read and write operations. The threshold device reduces or eliminates data disturb in half-selected memory plugs and increases S/N ratio during read operations.

Threshold device for a memory array

Non volatile memory device ion barrier

Array operation using a schottky diode as a non ohmic selection device

Ion barrier cap

A two-terminal memory cell including a Schottky metal-semiconductor contact as a non-ohmic device (NOD) allows selection of two-terminal cross-point memory array operating voltages that eliminate 'half-select leakage current' problems present when other types of non-ohmic devices are used. The NOD structure can comprise a 'metal/oxide semiconductor/metal' or a &#x201c;metal/lightly-doped single layer polycrystalline silicon.&#x201d; The memory cell can include a two-terminal memory element including at least one conductive oxide layer (e.g., a conductive metal oxide&#x2014;CMO, such as a perovskite or a conductive binary oxide) and an electronically insulating layer (e.g., yttria-stabilized zirconia&#x2014;YSZ) in contact with the CMO. The NOD can be included in the memory cell and configured electrically in series with the memory element. The memory cell can be positioned in a two-terminal cross-point array between a pair of conductive array lines (e.g., a bit line and a word line) across which voltages for data operations are applied.

Growing community of inventors

Los Altos, CA, United States of America

Roy Lambertson