X-Fab Semiconductor Foundries Ag

X-Fab Semiconductor Foundries Gmbh

Roy Knechtel

Daniela Guenther

Uwe Schwarz

Sophia Dempwolf

Andrej Lenz

Stefan Weinberger

Peter Tilo

Methods for the production of a semiconductor device are disclosed. In one embodiment, a method may include: () mechanically contacting a first substrate () having a semiconductor material to a second substrate () having a bondable passivation material and contact vias () extending through the bondable passivation material; () covering the contact vias () with an at least high-resistance material () on a side facing away from the first substrate (); () applying an electric potential between the at least high-resistance material and the first substrate. The potential has a sufficient level that is functionally sufficient to initiate a bonding process between the bondable passivation material of the second substrate and the semiconductor material of the first substrate.

Anodic bonding of a substrate of glass having contact vias to a substrate of silicon

A method is provided for producing at least one electrical via in a substrate, the method comprising: producing a protective layer over a component structure which has been produced or is present on a front side of the substrate; forming at least one contact hole which extends from a surface of a backside of the substrate to a contact surface of the component structure; forming a metal-containing and thus conductive lining in the at least one contact hole creating a hollow electrically conductive structure in the at least one contact hole; and applying a passivation layer over the backside of the substrate, the passivation layer spanning over the hollow electrically conductive structure for forming the at least one electrical via. Also provided is a micro-technical component comprising at least one electrical via.

Electrically conductive via(s) in a semiconductor substrate and associated production method

The invention relates to a process for and an arrangement of the connection of processed semiconductor wafers () wherein, in addition to the firm connection, there is an electric connection () between the semiconductor wafers and/or the electronic structures () supporting them. For this purpose, low-melting structured intermediate glass layers () are used as insulating layers and as an electric connection in the form of electrically conductive solder () on a glass basis in order to achieve a firm connection.

Firm, insulating and electrically conducting connection of processed semiconductor wafers

Disclosed are methods and microsystems for vertically through-plating () cover plates () for microsystem components () by means of a conductive solder glass (). Said methods and microsystems make it possible to simplify through-plating, reduce the failure rate, and increase reliability.

Hermetic sealing and electrical contacting of a microelectromechanical structure, and microsystem (MEMS) produced therewith

The invention relates to a method for producing semiconductor substrates by bonding. The aim of said method is to reduce the non-usable edge region on the bonded wafer component and to improve the edge geometry of the wafer composite. This is achieved by a method for joining two semiconductor wafers using a semiconductor wafer bonding process. The surfaces of the two semiconductor wafers that are to be bonded are provided with a border or edge geometry that has a special short front-end facet. After the bonding process, one of the two wafers is ablated to obtain an edge region that is as devoid as possible of defects and a usable wafer surface that is as large as possible.

Production of semiconductor substrates with buried layers by joining (bonding) semiconductor wafers

The invention relates to a method and arrangement for carrying out the nondestructive determination of the connection quality of bonded wafers () in order to verify the connection strength. The fact that an unbonded region () forms around a raised or recessed structure () on at least one of the connecting surfaces is made use of. The extension of the unbonded region is a measure of the strength of the wafer connection and is electrically determined by staggered contacts () that, with the formation of the bond connection, close, only in part, via a contact strip ().

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Geraberg, Germany

Roy Knechtel