Agere Systems Inc.

Lucent Technologies Inc.

Roy Baxter Blake

Jianqing Lin

Stephen Alan Allpress

Chun Wang

The present invention provides a transceiver couplable to a communications network having a jitter control processor and method of operating the same. In one aspect of the present invention, the jitter control processor of the transceiver includes a receiver stage. The receiver stage includes: (1) a receive time error measurement system configured to generate a receive time error signal as a function of a receive clock signal experiencing jitter and a feedback signal, (2) a jitter processing circuit configured to develop a dejittered control signal as a function of the time error signal, and (3) a clock generator system configured to provide the feedback signal as a function of the dejittered control signal and a transceiver local clock signal.

Transceiver having a jitter control processor with a receiver stage and a method of operation thereof

The present invention provides a transceiver couplable to a communications network having a jitter control processor and methods of operating the same. In one aspect of the present invention, the jitter control processor of the transceiver includes a transmitter stage that controls a transmit signal. In one embodiment, the transmitter stage includes a transmit time error measurement system configured to generate a transmit time error signal as a function of timing synchronization associated with a communications network clock and a transceiver master clock, a transmit filter circuit configured to develop a filtered time error signal as a function of the transmit time error signal, and a stuffing control system configured to insert a stuffing control signal into the transmit signal as a function of the transmit time error signal and the filtered time error signal.

Jitter control processor and a transceiver employing the same

A filter cell, method of deriving an echo component and an echo canceling system, bit pump and transceiver employing the same. In one embodiment, the filter cell includes a first summing node that receives a first input based on a signal sample that contains an echo component of an echo. The filter cell also includes a second summing node that receives a second input based on the signal sample. The filter cell still further includes a multiplier that employs outputs from the first and second summing nodes and a scaling factor to derive first and second outputs containing a remnant of the echo component.

Filter cell, method of deriving an echo component and an echo canceling system employing the same

A Decision-Feedback Equalizer (DFE) includes a Maximum Likelihood Sequence Estimator (MLSE) for estimating a symbol sequence. The DFE also includes a signal level decoder, and a delay line having a first plurality of taps being connected to the output of the signal level decoder, and a second plurality of taps being connected to the output of the MLSE. Furthermore, the DFE has an error signal generator having a first input connected to the input of the signal level decoder, and a second input connected to the output of the signal level decoder for adjusting coefficients of the taps. The symbol delay line has been split into two sections with the output of the MLSE being fed to part of the delay line. Because symbols in the delay line are adjusted with the coefficients and fedback to the signal level decoder, the output of the MLSE is able to correct symbols whenever its output is available. In such a symbol updating approach, error propagation in the delay line is avoided during an error event.

Decision-feedback equalizer with maximum-likelihood sequence estimation and associated methods

In a preferred embodiment, an FM demodulator includes an I and Q sampler for generating data samples of I and Q signals of an FM signal. A signal processor derives samples of a modulating waveform of the FM signal from the I and Q data samples, using a Lagrangian interpolation function of the I and Q data samples. Variables include derivatives of the I and Q signals obtained by differentiation of the Lagrangian function. Preferably, the processor further utilizes a correction factor to correct the modulating waveform samples obtained from the Lagrangian-based interpolation, to thereby derive a modulating waveform exhibiting low signal distortion.

Growing community of inventors

Denville, NJ, United States of America

Roy Baxter Blake