Honeywell International Inc.

Ross Merritt

Brian W Schipper

Christopher Jay Matthews

Michael Ray Elgersma

Vibhor L Bageshwar

Wayne A Soehren

Scott I Snyder

Timothy Merrill Buck

Christopher A Lund

James B Oven

Dang Tu Van-Cao

Trevor Keith Stephens

A method and system for celestial navigation are provided. The method comprises requesting access to a light source on a low earth orbit (LEO) satellite; and sending an uplink message to the LEO satellite to power on the light source, in response to the access request. The method further comprises determining whether the LEO satellite is in view of a camera; capturing a light image, from the light source, on a focal plane location of the camera when the LEO satellite is in view of the camera; and comparing the focal plane location to a predicted location of the LEO satellite. The method updates position information of a user based on an observation error from comparing the focal plane location to the predicted location.

Celestial navigation object availability using light source enabled satellites

A method of assuring integrity of range measurements and position solutions comprises obtaining range measurement statistics between network nodes, performing a snapshot integrity test for the range measurement statistics, and performing a sequential integrity test using the range measurement statistics. The snapshot integrity test comprises using Gram matrices with a current configuration of the nodes; performing a singular value consistency check using the Gram matrices against a user selected threshold; and detecting and excluding range measurement statistics with instantaneous errors that cause the singular value to exceed the threshold. The sequential integrity test comprises formulating main node and sub-node sets using solution separation; implementing filters for the main node and sub-node sets; performing a consistency check using discriminators and decision thresholds; detecting and excluding range measurement statistics with both instantaneous and time-correlated errors; and computing a protection level for relative positions computed from the main node and sub-node sets.

Integrity of range measurements

An example pointing system includes a sensor that measures change in angular position, a first GNSS antenna, and a second GNSS antenna mounted to a rigid body that is removable from the pointing system after calibration of the sensor. The GNSS antennas have a fixed, known baseline. The pointing system includes at least one GNSS receiver with first and second RF inputs respectively coupled to the GNSS antennas. The at least one GNSS receiver includes respective paths to process GNSS signals received from the first and second RF inputs. The pointing system includes at least one processor, communicatively coupled to the sensor and receiver, configured to: determine initial attitude of the pointing system based on the processed GNSS signals; calibrate the sensor using the determined initial attitude; determine a pointing solution for the pointing system based on measurements from the calibrated sensor without GNSS signals from second GNSS antenna.

Pointing system alignment using GNSS attitude determination with removable GNSS antenna

An Inertial Navigation System (INS) testing system includes a Unit Under Test (UUT) with an INS module, a DAT tool configured to provide command and control functions to a user, and a Dynamically Integrated Navigation Tester (DINT) in communication with the UUT and the DAT tool. The DINT includes a truth data conversion module configured to receive truth data and convert it to navigation data suitable for transmission to the UUT. The INS testing system advantageously allow a user to interface with a UUT while providing user-specified dynamic inputs from the DINT with the truth data selected by the user.

Dynamically integrated navigation tester

A multiple processor architecture with flexible external input/output interface is provided. In one embodiment, an open flexible processor architecture avionics device comprises: a multiple processor architecture having a primary processor, a secondary processor, a random access memory (RAM) coupled to at least the secondary processor, and a shared memory coupled to the primary and secondary processor; and a flexible input/output (I/O) interface coupled to the multiple processor architecture, wherein the flexible I/O interface provides I/O access to the primary processor using a fixed I/O protocol, and provides I/O access to the secondary processor using at least one re-configurable I/O protocol; wherein the primary processor is dedicated to executing embedded software for implementing a primary base functionality, the primary processor has read and write access to the shared memory, and the primary processor is not reprogrammable; and wherein the secondary processor has read-only access to the shared memory and is programmable.

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Ramsey, MN, United States of America

Ross Merritt