Freescale Semiconductor,inc.

Other

Ross Edward Noble

Leo Mathew

Thuy B Dao

Dina H Triyoso

Dharmesh Jawarani

John M Grant

David C Wang

Jill C Hildreth

John J Hackenberg

Michael Rendon

Raghaw S Rai

Hunter J Martinez

Combustion appliances for providing heat for cooking meats and other foods are provided. The appliances are self-stoking, in that they do not need to be repeatedly re-filled with more fuel periodically, such as during an 18-hour slow cook procedure. A venturi assembly is provided which consists of a venturi duct and baffle, which creates a higher flow, lower pressure region within the venturi assembly, which gases mix with spent combustion gases to provide a more uniform temperature output.

Self-stoking combustion appliance and cookers

A method for making a semiconductor device is provided by (a) providing a substrate () having first () and second () gate structures thereon; (b) forming an underlayer () over the first and second gate structures; (c) removing the underlayer from the first gate structure; (d) forming a first stressor layer () over the first and second gate structures; and (e) selectively removing the first stressor layer from the second gate structure through the use of a first etch which is selective to the underlayer.

Dual interlayer dielectric stressor integration with a sacrificial underlayer film stack

A method of forming a through silicon via includes forming a via opening in a substrate using a hard mask, wherein a polymer is formed in the via opening. A first wet clean removes a first portion of the polymer and forms a first carbon containing oxide along portions of the sidewalls. A first ash process modifies the first carbon containing oxide and removes a second portion of the polymer. A first wet etch removes the modified first carbon containing oxide and a third portion of the polymer. A second ash process forms a second carbon containing oxide along at least a portion of the sidewalls. A second wet etch process removes the second carbon containing oxide and a fourth portions of the polymer. A third ash process forms a third carbon containing oxide along portions of the sidewalls and removes any remaining portions of the polymer.

Method for forming a through silicon via (TSV)

A method of forming a semiconductor layer, which in one embodiment is part of a photodetector, includes forming a silicon shape, applying ozonated water, removing the first oxide layer at a temperature below 600 degrees Celsius, and epitaxially growing germanium. The silicon shape has a top surface that is exposed. The ozonated water is applied to the top surface and causes formation of a first oxide layer on the top surface. The germanium is grown on the top surface.

Method of forming a semiconductor layer

A method for depositing metals on surfaces is provided which comprises (a) providing a substrate () having a horizontal surface () and a vertical surface (); (b) depositing a first metal layer () over the horizontal and vertical surfaces; (c) depositing a layer of polysilicon () over the horizontal and vertical surfaces; (d) treating the layer of polysilicon with a plasma such that a residue () remaining from the treatment is preferentially formed over the horizontal surfaces rather than the vertical surfaces, and wherein the residue is resistant to a first metal etch; and (e) exposing the substrate to the first metal etch.

Method to control uniformity/composition of metal electrodes, silicides on topography and devices using this method

An insulating layer () is formed over a stack () of materials and a semiconductor substrate () and an implant is performed through the insulating layer into the semiconductor substrate. In one embodiment, spacers () are formed over the insulating layer (), the insulating layer () is etched, and heavily doped regions () are formed adjacent the spacers. The spacers () are then removed and extension regions () and optional halo regions () are formed by implanting through the insulating layer (). In one embodiment, the insulating layer () is in contact with the semiconductor substrate (). In one embodiment, the stack () is a gate stack including a gate dielectric (), a gate electrode (), and an optional capping layer (). The insulating layer () may include nitrogen, such as silicon nitride and aluminum nitride. In another embodiment, the insulating layer () may be hafnium oxide.

Growing community of inventors

Austin, TX, United States of America

Ross Edward Noble