Adeia Semiconductor Technologies LLC

Invensas LLC

Roseann Alatorre

Ellis Chau

Philip Damberg

Reynaldo Co

Wei-Shun Wang

Se Young Yang

Zhijun Zhao

A microelectronic package includes a substrate having a first surface. A microelectronic element overlies the first surface. Electrically conductive elements are exposed at the first surface of the substrate, at least some of which are electrically connected to the microelectronic element. The package includes wire bonds having bases bonded to respective ones of the conductive elements and ends remote from the substrate and remote from the bases. The ends of the wire bonds are defined on tips of the wire bonds, and the wire bonds define respective first diameters between the bases and the tips thereof. The tips have at least one dimension that is smaller than the respective first diameters of the wire bonds. A dielectric encapsulation layer covers portions of the wire bonds, and unencapsulated portions of the wire bonds are defined by portions of the wire bonds, including the ends, are uncovered by the encapsulation layer.

Package-on-package assembly with wire bond vias

Growing community of inventors

San Jose, CA, United States of America

Roseann Alatorre