Nvidia Corporation

Rongzhe Zhu

Shuai Wang

Xiao Wu

Yuji Qian

Xixi Xie

Chen Yao

Kun Yang

Nagaraju Balasubramanya

Shangang Zhang

Jinyue Lu

Weiping Pan

Tinghai Miao

In various examples, a system comprising at least one circuit to detect whether a fault has occurred during performance of an operation by the at least one circuit. In at least some embodiments, the at least one circuit generates error detecting values and determines a fault has occurred when the error detecting values do not match predetermined error detecting data.

Detecting hardware faults in data processing pipelines

Disclosed are apparatuses, systems, and techniques to perform and facilitate secure ladder computational operations whose iterative execution depends on secret values associated with input data. Disclosed embodiments balance execution of various iterations in a way that is balanced for different secret values, significantly reducing vulnerability of ladder computations to adversarial side-channel attacks.

Techniques, devices, and instruction set architecture for balanced and secure ladder computations

Disclosed are apparatuses, systems, and techniques to perform and facilitate secure ladder computational operations whose iterative execution depends on secret values associated with input data. Disclosed embodiments use masking factors that re-blind secret data without exposing the unmasked secret data between iterations of the ladder computations. Some disclosed embodiments use Montgomery multiplication techniques to facilitate secret data masking by efficiently avoiding modular division operations. Disclosed embodiments significantly reduce the vulnerability of ladder computations to adversarial side-channel attacks.

Efficient masking of secure data in ladder-type cryptographic computations

Disclosed are apparatuses, systems, and techniques to perform and facilitate fast and efficient modular computational operations, such as modular division and modular inversion, using shared platforms, including hardware accelerator engines.

Techniques, devices, and instruction set architecture for efficient modular division and inversion

Growing community of inventors

Shanghai, China

Rongzhe Zhu