Boe Technology Group Co., Ltd.

Hefei Xinsheng Optoelectronics Technology Co., Ltd.

Hefei Boe Display Technology Co., Ltd.

Hefei Boe Optoelectronics Technology Co., Ltd.

Wuhan Boe Optoelectronics Technology Co., Ltd.

Rongcheng Liu

Huiming Wang

Hui Wang

Jing Yan Ma

Peng Zhao

Xiong Xiong

Xiuqin Yang

Hengzhen Liang

Yanwei Lv

Peng Hui Jiang

Jian Li

Jiantao Liu

Ke Dai

Min Wang

Xin Xiong

Chao Kong

Zuquan Hu

Jinliang Liu

Yifeng Zou

Huanyu Li

Yudong Liu

Yunhai Wan

Xiaozhe Zhang

Douqing Zhang

Yue Du

Siying Lu

Jinbo Xu

Shaohui Li

Qing Lei

Zhengwei Al

Wenjun Gong

Wei Yuan

A drive method for a display panel, and a display apparatus. The drive method includes: when current original gray-scale values corresponding to sub-pixels in the same region are the same in a plurality of continuous display frames, converting the current original gray-scale values into a first target gray-scale value and a second target gray-scale value; in a current display frame of the plurality of continuous display frames, controlling a data voltage corresponding to the first target gray-scale value to be input to a first sub-pixel unit in the region, and controlling a data voltage corresponding to the second target gray-scale value to be input to a second sub-pixel unit in the region, where each of the first sub-pixel unit and the second sub-pixel unit includes at least one sub-pixel.

Drive method for controlling data voltage of display panel, and display apparatus including source drive circuit for controlling data voltage of display panel

A display panel driving method, a display panel and a display apparatus. The display panel driving method comprises: according to a data signal transmitted in a data line, determining whether a grayscale value difference of a data signal input by a pixel unit of an nth row and a data signal input by a pixel unit of an (n−1)th row is greater than a threshold, n being a positive integer less than or equal to N; if the grayscale value difference between the data signal input by the pixel unit of the nth row and the data signal input by the pixel unit of the (n−1)th row is greater than the threshold, then adjusting the phase of a clock signal input by the nth shift register, such that the falling of the pull-up node of the nth shift register is delayed along with time, to output a phase-delayed scan signal.

Display panel driving method, display panel, and display apparatus

A gate driving circuit and a display panel are provided. The gate driving circuit includes a plurality of shift register units as cascaded, and the plurality of shift register units as cascaded includes a first shift register unit including a first clock signal terminal, an (n+1)-th shift register unit including an (n+1)-th clock signal terminal, a second shift register unit including a second clock signal terminal, and an (n+2)-th shift register unit including an (n+2)-th clock signal terminal. The gate driving circuit further includes a first clock signal line connected to the first clock signal terminal and the (n+1)-th clock signal terminal, and a second clock signal line connected to the second clock signal terminal and the (n+2)-th clock signal terminal.

Gate driving circuit and display panel

The disclosure provides a voltage adjustment method and a voltage adjustment device for a display panel, and a display device. The method includes: detecting whether an absolute value of a difference between a first gray scale data of a first sub pixel and a second gray scale data of a second sub pixel in a static picture area is larger than a preset gray scale threshold; if so, acquiring the first gray scale data; and inputting a target data voltage to the data line according to the first gray scale data, to adjust an original pixel voltage to the first sub pixel into a target pixel voltage and to cause an absolute value of a difference between a first voltage difference in the positive frame and a second voltage difference in the negative frame to be smaller than a preset voltage difference threshold.

Voltage adjustment method and adjustment device for display panel, and display device

Circuit and method for preventing screen flickering, a drive circuit for a display panel, and a display apparatus are provided, relating to the field of display technology. The circuit for preventing screen flickering includes a control sub-circuit configured to control a gate drive circuit of the display panel to output a gate cut-off level during a power-on period of the display panel. The gate drive circuit of the display panel is controlled to output the gate cut-off level during the power-on period, the gate cut-off level is provided to gate lines of the display panel such that TFTs connected to the gate lines are in cut-off state during the power-on period.

Circuit and method for preventing screen flickering, drive circuit for display panel, and display apparatus

The present disclosure relates to the field of display technology, and provides a display module and a display device. The display module includes a first display sub-panel, where the first display sub-panel includes: a first display sub-panel including a plurality of first pixel units; and a second display sub-panel arranged at a light-entering side of the first display sub-panel and including a plurality of second pixel units. Each second pixel unit corresponds to at least one first pixel unit, an orthogonal projection of each second pixel unit onto the first display sub-panel coincides with the corresponding first pixel unit, and the second display sub-panel is a vertical-electric-field-type liquid crystal display panel.

Display module and display device

A gate driver circuit, a display device and a driving method. The gate driver circuit includes: a scan signal generation circuit, wherein the scan signal generation circuit includes N1 stages of first output terminals, and the scan signal generation circuit is configured to output N1 first pulse scan signals stage by stage respectively through the N1 stages of first output terminals; and N2 level conversion circuits, wherein the N2 level conversion circuits are configured to output under a control of a plurality of conversion control signals N1 second pulse scan signals which are in one-to-one correspondence with the N1 first pulse scan signals, and the plurality of conversion control signals include a plurality of first sub-control signals which are the N1 first pulse scan signals, wherein N1 is an integer greater than or equal to 2, and N2 is an integer greater than or equal to 2.

Gate driver circuit, display device and driving method

The present application provides a GOA circuit, a GOA circuit driving method, a GOA driving circuit and a display device, the GOA circuit includes: a front-end GOA circuit, which is connected to a connection signal input terminal, a reset signal terminal, a first power supply voltage terminal, and a second power supply voltage terminal, a third power supply voltage terminal, a clock signal terminal, and a front-end output terminal, and is configured to output a clock signal at the clock signal terminal to the front-end output terminal when an input signal at the signal input terminal is at an active input level; and a repair circuit, which is connected to the front-end output terminal, a frame start signal, the first power supply voltage terminal, and an output terminal of the GOA circuit.

GOA circuit and driving method thereof, GOA driving circuit, and display device

The embodiments of the present disclosure propose a booster circuit and a method for driving the same, a shutdown circuit and a method for driving the same, and a display apparatus. The booster circuit includes a first input sub-circuit coupled to a first input signal terminal, a first voltage signal terminal, and an output signal terminal, and configured to transmit a first voltage signal at the first voltage signal terminal to the output signal terminal under control of a first input signal at the first input signal terminal; a second input sub-circuit coupled to a second input signal terminal, the first voltage signal terminal and a first node, and configured to transmit the first voltage signal at the first voltage signal terminal to the first node under control of a second input signal at the second input signal terminal; and a first storage sub-circuit coupled to the output signal terminal and the first node, and configured to cause a level of an output signal at the output signal terminal to be raised to a level higher than the first voltage signal.

Booster circuit, shutdown circuit, methods for driving the same, and display apparatus

A method for driving a display panel, a device for driving a display panel and a display device are provided. The method for driving a display panel includes: acquiring a GOA signal corresponding to a current frame of image, where the GOA signal includes a plurality of clock signals; determining a transmission channel corresponding to each of the plurality of clock signals, and generating a correspondence relationship between the clock signals and respective transmission channels, where the transmission channels are used to deliver the clock signals from a GOA control signal generator to a GOA circuit of the display panel, the current frame of image is different from at least one frame of image previous to the current frame of image with respect to the correspondence relationship between the clock signals and respective transmission channels; and transmitting the clock signals by using the determined transmission channels.

Method and device for driving display panel and display device

There are provided a shift register unit and a driving method thereof. The shift register unit includes: an input circuit, whose first terminal receives an input signal of the shift register unit, and second terminal is connected to a pull-up node, the input circuit being configured to output the input signal to the pull-up node; an output circuit, whose first terminal is connected to a clock signal terminal, second terminal is connected to the pull-up node, third terminal is connected to an output terminal of the shift register unit, the output circuit being configured to output a signal of the clock signal terminal to the output terminal under the control of the pull-up node; a pull-up node control circuit, and the pull-up node control circuit being configured to discharge the pull-up node through third power supply voltage terminal under the control of a first power supply voltage terminal.

Shift register unit and driving method thereof, gate driving apparatus and display apparatus

An array substrate and a manufacturing method thereof are provided. The method for manufacturing the array substrate includes: forming a passivation layer on a base substrate; forming photoresist on the passivation layer, and forming a first photoresist pattern including a photoresist-completely-retained region, a photoresist-partially-retained region and a photoresist-completely-removed region, by exposure and development processes; forming a first through hole in the passivation layer by etching the passivation layer with the first photoresist pattern as a mask; forming a second photoresist pattern by performing ashing on the first photoresist pattern to remove the photoresist in the photoresist-partially-retained region and reduce a thickness of the photoresist in the photoresist-completely-retained region; and etching the passivation layer with the second photoresist pattern as a mask, so as to reduce a thickness of the passivation layer in the photoresist-partially-retained region.

Array substrate and manufacturing method thereof

A gate driving circuit according to the present disclosure may include: a plurality of gate driving units, each of which is connected to a pulse signal input end, a timing control signal input end and at least two adjacent gate scanning lines respectively, and configured to sequentially provide the at least two adjacent gate scanning lines connected thereto with a pulse signal inputted by the pulse signal input end under a control of a timing control signal inputted by the timing control signal input end. The pulse signal input end is connected to a gate driver which outputs the pulse signal based on a number of gate scanning lines corresponding to each of the gate driving units.

Gate driving circuit, method for driving the same, and display device

An array substrate includes: a first metal area disposed at an edge portion of the array substrate and electrically connected with a common electrode line or common electrodes; a second metal area disposed at the edge portion of the array substrate, corresponding to and insulated from the first metal area, and configured for access of a stabilized voltage that is a fixed voltage. At least one capacitor is formed by the first metal area and the second metal area. The array substrate can obtain more stable pixel common electrode voltage.

Array substrate, manufacturing method thereof and display device

The present invention relates to the field of display technology, and provides a circuit and a method for eliminating a shutdown after-image, and a display device. The circuit for eliminating the shutdown after-image in a liquid crystal panel comprises a control module configured to apply a common voltage of a liquid crystal panel to a gate line of the liquid crystal panel under the control of a shutdown signal when the liquid crystal panel is shut down. According to the present invention, it is able to eliminate the shutdown after-image and prevent the occurrence of large shutdown current.

Growing community of inventors

Beijing, China

Rongcheng Liu