Agency for Science, Technology and Research

National University of Singapore

Rong Zhao

Luping Shi

Ping Luo

Tow Chong Chong

Hao Meng

Pik Kee Tan

Yee Chia Yeo

Xiang Hu

Minghua Li

Weiwei Lina Fang

Lu Ping Shi

Weijie Wang

Xiang Shui Miao

Kai Jun Yi

Kok Leong Desmond Loke

Ke Bin Li

A method for programming a resistive memory cell is provided. The method may include providing a programming signal to the resistive memory cell. The programming signal may include an electrical pulse and a bias pulse coupled with the electrical pulse. The electrical pulse includes an electrical pulse portion, and the bias pulse includes at least two bias pulse portions, wherein the electrical pulse portion is positioned between the at least two bias pulse portions. The bias pulse includes a voltage below a threshold switching voltage of the resistive memory cell. The programming signal includes a peak voltage above the threshold switching voltage of the resistive memory cell.

Method for programming a resistive memory cell, a method and a memory apparatus for programming one or more resistive memory cells in a memory array

According to embodiments of the present invention, a memory component is provided. The memory component includes a storage component comprising a resistance changing material; and an electrical contact coupled to the storage component, wherein the electrical contact comprises silicide, wherein the memory component is free of a metal layer between the storage component and the electrical contact, and wherein the electrical contact is free of a metal layer.

Memory component having an electrical contact free of a metal layer

A memory cell for an electrically writeable and erasable memory medium as well as a memory medium thereof is provided. The memory cell comprises a data recording element, the data recording element has a plurality of multiple-layer structure disposed one on top of another; each the multiple-layer structure comprising a plurality of sequentially disposed individual layers. At least one of the plurality of individual layers is capable of changing phase between a crystalline state and an amorphous state in response to an electrical pulse, one of the plurality of individual layers having at least one atomic element which is absent from other one of the plurality of individual layers, and the plurality of multiple-layer structure is of a superlattice-like structure to lower a heat diffusion out of the data recording element to shorten a phase change time of the respective individual layers.

Electrically writable and erasable memory medium having a data element with two or more multiple-layer structures made of individual layers

Growing community of inventors

Singapore, Singapore

Rong Zhao