Motorola Corporation

Ronen Shtayer

Roni Eliyahu

Yaron Ben-Arie

Aviel Livay

Yehuda Shvager

Ron Eliyahu

Joffe Alexander

Naveh Alon

An ATM line card is provided wherein a microprocessor bus is selectively coupled to a memory bus during maintenance time intervals. This allows direct transfer of connection memory data to the microprocessor system of the line card and thus to the RAM of the system. After the transfer is accomplished the busses are decoupled again so that further maintenance work of the connection memory and the transferred data can be done independently. If the access to the connection memory is due to a destructive read operation the corresponding memory locations in the connection memory are reset simultaneous to the transfer of the data which are read out from the DMA of the microprocessor system to the RAM. This results in a dramatic reduction of the time required for maintenance of the ATM system.

ATM line card and method for transferring connection memory data

A transfer layer of an ATM type used between a switch (216) and a number N of communication channels (218). Each communication channel (218) has second storage arrangement B.sub.0, . . . , B.sub.N-1 for storing cell queues having a length of up to P cells each, one of the second storage arrangements being in a busy condition if a minimum number M of cells is stored therein, where M is lesser of equal P. Each communication channel is assigned to one of the switch queues. The transfer layer (217) has third storage arrangement T for storage of a cell queue having a length of up to L cells. Furthermore the transfer layer (217) selectively disables the input of a cell from one of the switch queues into the third storage arrangement if the second storage arrangement is in a busy condition.

Transfer layer of the ATM type and method for operating a transfer switch

A method (FIGS. 5-6) and a structure (FIGS. 3-4) are taught herein for prioritizing and transmitting forward monitoring cells (FMCs) for performance monitoring in an asynchronous transfer mode (ATM) system. An ATM system may have multiple physical lines which have many virtual paths which have multiple virtual connections. These paths/connections may be performance monitored by transmitting an FMC each time N ATM data cells are received for the connection/path (wherein N is number which may be different for each connection/path). The number of data cells are stored via a counter for each connection/path being monitored. Once N ATM cells are received on a given connection/path, an FMC descriptor is queued which indicates that the FMC cell for the given connection/path must be transmitted before receipt of N/2 subsequent cells received by the given connection/path. A priority (which is a function of one of the counters) is used to ensure that the N/2 requirement is satisfied.

Method and structure for prioritizing performance monitoring cells in an

A method for scheduling asynchronous transfer mode (ATM) data cells for transmission in an ATM system uses a plurality of queues. The plurality of queues are separated into waiting queues of a lower priority and transmit queues of a higher priority. ATM tokens which identify one active channel a piece are positioned in the queues and rotated/shifted to new positions over time. As time progresses, ATM tokens are shifted/rotated from waiting queues of a lower priority to transfer queues of a higher priority wherein the tokens (and therefore specific ATM channels) are selected and ATM data cell(s) are transmitted in response to the selection. This queued/shifted selection process ensures that bandwidth requirements are adhered to in the ATM system. The selected tokens are eventually (after all needed ATM data cell(s) are transmitted for a single selection) re-scheduled to a queue of lower priority.

Method and apparatus for pacing asynchronous transfer mode (ATM) data

An asynchronous transfer mode (ATM) system has a plurality of physical layers (24, 50, 52, and 26) coupled to one ATM layer (12) for communicating ATM data cells. In order to allow bi-directional communication, both the receive interface and the transmit interface of FIGS. 14 and 15 are coupled between the ATM layer and each physical (PHY) layer in the plurality of physical layers. In order to identify which physical layer of the plurality of physical layers is to either receive or transmit a data cell, a physical layer ID byte is transmitted along with the UTOPIA protocol multi-byte ATM data cell to address one physical layer in the plurality of physical layers.

Asynchronous transfer mode (ATM) system having an ATM device coupled to

An asynchronous transfer mode (ATM) address compression method uses a PHY ID (14). The PHY ID (14) is provided before the transmission of a 53-byte ATM data cell (12, 16, and 18). The PHY ID (14) (also referred to as a link) is used to access a link table (20). The link table (20) contains address compression mode information which allows for many address compression modes and an enable bit, an address pointer, and a mask value which are used to both reduce ATM addressing bits and identify a virtual path table/entry in the ATM system. In some address compression modes, the identified virtual path contains the ingress connection identifier (ICI) which identifies a physical data routing path in the ATM system. In other address compression modes, further address compression of virtual channel identifiers is required beyond the virtual path tables in order to identify a virtual channel table/entry which then contains the ICI.

Growing community of inventors

Tel Aviv, Israel

Ronen Shtayer