Amazon Technologies, Inc.

Ronen Shitrit

Hani Ayoub

Nafea Bshara

Adi Habusha

Barak Wasserstrom

Anthony Nicholas Liguori

Matthew Shawn Wilson

Brian William Barrett

Clint Joseph Sbisa

Said Bshara

Saar Gross

Guy Zalik

Yaniv Meidan

A processor in a peripheral device can include a wait-for-event mechanism, through which the processor can enter low-power mode and be woken from lower-power mode with an event. Using an event, rather than an interrupt, allows the processor to wake without the latency incurred by an interrupt handling routine. In various implementations, the processor may be configured to execute a sequence of instructions that include a wait-for-event instruction. The wait-for-event instruction can be called when the processor is idle. The wait-for-event instruction may initiate a low-power mode for the processor, wherein the processor suspends executing the sequence of instructions. The processor may further be configured to receive, at an event input, an event signal. The event signal may cause the processor to exit the low-power mode and to resume executing the sequence of instructions from the point at which the processor suspended executing the sequence of instructions.

Low-latency wake-up in a peripheral device

Techniques for updating code of a device may be described. In an example, bus may connect the device to a management entity. The device may run a first version of the code. A second version of the code may be available from memory. The device may access the second version from the memory, stop running the first version of the code, and start running the second version of the code without restarting the management entity or the device.

Updating device code through a bus

A method of transferring data between a host and a PCI device is disclosed. The method comprises mapping a fixed memory-mapping control block in a host memory of the host to a control register of a memory-mapping unit of the PCI device; mapping a dynamic data-access memory block in the host memory to a default memory block in a memory of the PCI device, wherein the memory-mapping unit translates an address between the dynamic data-access memory block and a memory block in the memory of the PCI device; and dynamically modifying a value in the control register of the memory-mapping unit through the fixed memory-mapping control block such that an address of the dynamic data-access memory block in the host memory is translated to a different address in the memory of the PCI device based on the modified value in the control register of the memory-mapping unit.

Device full memory access through standard PCI express bus

In one example case, a cross-platform system includes a first automated test platform having a first test instrument and a first glue layer interface that exposes test functions to direct testing by the first test instrument. The system further includes a second automated test platform having a second test instrument and a second glue layer interface that exposes the same test functions to direct testing by the second test instrument. In the system, the glue layers abstract the respective and different control commands used by the different, first and second test instruments. Using the glue layers, the same higher-level test code can be executed by the control computers of both the first and second automated test platforms.

Cross-platform device testing through low level drivers

Growing community of inventors

Kiryat Ata, Israel

Ronen Shitrit