General Dynamics Advanced Information Systems, Inc.

General Dynamics Information Systems, Inc.

Control Data Corporation

Generyal Dynamics Information Systems, Inc.

Ronald R Denny

Deepak Keshav Pai

Bobby Jim Kowalski

William J Leinberger

Terrance A Krinke

Andrew D Josephson

James T Seward

Clark F Webster

Jeanne M Chevalier

Jeffery Stagg Young

Michael P Ebsen

Robert M Lufkin

Thomas Rosenthal

George F Schwartz, Iii

Charles Eumurian

Chris H Simon

Richard J Claeys

Joseph D Vaughan

Joan E Zak

A connector system is provided. The system includes a substantially circular interconnecting hub, and a plurality of circuit board bays configured substantially radially around the substantially circular interconnecting hub. Each circuit board bay has a plurality of aligned connectors configured to receive a circuit board. The interconnecting circuit hub has, for each individual circuit board bay, a direct data pathway connecting the individual circuit board bay to all remaining circuit board bays of the plurality of circuit board bays. Each of the plurality of circuit board bays can directly communicate through the interconnecting hub with each of the remaining circuit boards bays.

Expandable fluid cooling structure

A method for retrieving and managing addresses is provided. The steps may include of receiving, at a first buffer of m buffers, a request for an address; obtaining the address from a corresponding first register of the m registers; sending the address, received by said obtaining, to a destination; storing the address, received by the obtaining, in the first buffer; and clearing the contents of a second buffer of the m buffers, in response to any of said receiving, obtaining or storing, without clearing the contents of said first buffer, wherein m is a positive integer.

System and method for managing addresses in a computing system

The present invention provides a number of techniques for laminating and interconnecting multiple substrates to form a multilayer package or other circuit component. A solder bump may be formed on the conductive pad of at least one of two or more substrates. The solder bump preferably is formed from an application of solder paste to the conductive pad(s). Adhesive films may be positioned between the surfaces of the substrates having the conductive pads, where the adhesive films include apertures located substantially over the conductive pads such that the conductive pads and/or solder bumps confront each other through the aperture. The two or more substrates then may be pressed together to mechanically bond the two or more substrates via the adhesive films. The solder bump(s) may be reflowed during or after the lamination to create a solder segment that provides an electrical connection between the conductive pads through the aperture in the adhesive films.

Method for forming laminated multiple substrates

System and method for interconnecting circuit boards

A method of and architecture for controlling board elements in an orthogonal system architecture is provided. The method and architecture preferably utilize an internal bus architecture between control boards, such that a first control board can access board elements in its stack via I/O on a second control board and the second control board can access board elements in its stack via I/O on the first control board. Most preferably the internal bus architecture is a HyperTransport bus architecture.

Method and apparatus for a federation control plane in an orthogonal system

Technique for laminating multiple substrates

The present invention is for laminated and interconnected multiple substrates forming a multilayer package or other circuit component. A solder bump may be situated on the conductive pad of at least one of two or more substrates. The solder bump preferably is formed from an application of solder paste to the conductive pad(s). Adhesive films may be positioned between the surfaces of the substrates having the conductive pads, where the adhesive films include apertures located substantially over the conductive pads such that the conductive pads and/or solder bumps confront each other through the aperture. The two or more substrates pressed together via the adhesive films are mechanically bonded. The solder bump(s) may be reflowed during or after the lamination to create a solder segment that provides an electrical connection between the conductive pads through the aperture in the adhesive films.

Laminated multiple substrates

The present invention provides a number of techniques for laminating and interconnecting multiple high-layer-count (HLC) substrates to form a multilayer package or other circuit component. A solder bump may be formed on the conductive pad of at least one of two HLC substrates. The solder bump preferably is formed from an application of solder paste to the conductive pad(s). An adhesive film may be positioned between the surfaces of the HLC substrates having the conductive pads, where the adhesive film includes an aperture located substantially over the conductive pads such that the conductive pads and/or solder bumps confront each other through the aperture. The HLC substrates then may be pressed together to mechanically bond the two substrates via the adhesive. The solder bump(s) may be reflowed during or after the lamination to create a solder segment that provides an electrical connection between the two conductive pads through the aperture in the adhesive film.

Laminated multilayer package

Process for manufacturing laminated high layer count printed circuit boards

An apparatus and method for adjusting the clock delay in systems with multiple integrated circuits has a controller, a programmable clock generator and a plurality of integrated circuits, each integrated circuit including a data flip-flop, a programmable delay and a clock-fanout tree, wherein the clock delay in the integrated circuits is adjusted to match the inherent delay in the integrated circuit having the longest inherent delay.

Method and apparatus for adjusting the clock delay in systems with multiple integrated circuits

A multilayer package includes a plurality of interconnected large-layer-count (LLC) substrates. The LLC substrates each include conductive pads on the top and bottom surfaces of the substrate, a via in the substrate including conductive material to contact the pads on the top and bottom surfaces, and a post on a pad over the via. The posts of the substrates confront and abut each other, and are electrically bonded together. A non-flowable adhesive film mechanically bonds the LLC substrates, and has an aperture receiving the posts of the substrates.

Laminated multilayer substrates

A process of laminating a large-layer-count (LLC) substrates includes formation of first and second vias through respective substrates. A conductive path is formed through each of the respective vias, and posts are formed on the respective vias, electrically connected to the respective conductive path. A non-flowable adhesive layer having an aperture is provided between the LLC substrates so that the posts confront each other through the aperture. The LLC substrates are pressed together through the non-flowable adhesive layer to mechanically bond them together, and so that the posts abut each other. Simultaneously, the posts are electrically bonded to each other in the aperture.

A connecting device is disclosed for electrically and mechanically linking multiple circuit boards arranged in two perpendicular stacks. The connecting device includes two identical connectors, each with a plurality of outwardly extended electrical socket contacts, and a pair of opposite, electrically insulative shoulders projected outwardly beyond the socket contacts. Electrical pin contacts are recessed into the shoulders. The pair of connectors can be engaged when in facing relation, with one of them rotated 90.degree. relative to the other. As the connectors are moved toward engagement, each shoulder of each connector enters into a nesting relation between the opposed shoulders of the other connector, pre-aligning the opposed pin and socket contacts. The shoulders have inclined edges at their outer faces, to assist in capturing their associated opposed shoulders and guide them, in a self-aligning manner, into the nesting relation. The connectors require a 90.degree. angular offset for their engagement, and thus facilitate interconnection of circuit boards in orthogonal stacks.

Growing community of inventors

Brooklyn Center, MN, United States of America

Ronald R Denny