Advanced Micro Devices Corporation

Ronald M Huff

John Phillip Hansen

Louis R Stott

A microcontroller is presented including additional hardware which generates additional address signals needed to expand the memory address space of the microcontroller. The additional address signals allow access to memory locations within external memory devices which would not otherwise be accessible while advantageously maintaining software compatibility with previous microcontroller products. The most significant address signals divide memory locations within the external memory devices into multiple memory banks of equal size. The remaining least significant address signals are used to access memory locations within each memory bank. When memory banking is enabled, software instructions select the desired memory bank by writing appropriate values to address bit positions within one or more memory banking registers. In a first embodiment, additional &ldquo;auxiliary&rdquo; address signals have values stored within corresponding bit positions of a memory banking control (MBC) register. A second embodiment includes the ability to generate multiplexed address signals for DRAM devices, and to generate the multiplexed address signals such that variably sized DRAM devices are easily accommodated. When address signals are generated which correspond to a portion of the memory address space reserved for operating system software, the additional hardware modifies the additional address signals such that a selected memory bank is always accessed. As a result, operating system software need only be present in the selected memory bank. Elimination of the need to duplicate operating system software in each memory bank mapped to a reserved portion of the memory address space allows efficient utilization of the external memory devices.

Microcontroller having dedicated hardware for memory address space expansion supporting both static and dynamic memory devices

A computer system is presented having a mechanism for re-configuring the size of a data bus which links memory and/or input/output devices, or which links those devices to an execution unit. The mechanism includes a microcontroller embodying an chip select unit and a bus interface unit. The chip select unit allows computer system initiation from an upper memory address space occupied by a ROM. Thereafter, middle and lower memory address spaces occupied by RAM can be accessed by either an 8-bit or a 16-bit data bus, that data bus being either separate from or multiplexed with an address bus. The size of RAM can be configured in accordance with the data bus size which accesses RAM. Input/output address space can also be adjusted depending upon the data bus size which accesses input/output peripherals. The microcontroller thereby includes chip select signals which select the various memory devices and the input/output device, and further includes a bus interface unit which programmably chooses either 8-bit or 16-bit accesses to those selected devices.

Computer system with programmable bus size

In a microcontroller, a synchronous serial port is coupled to a DMA unit such that a series of DMA writes to the synchronous serial port can be followed by a series of DMA reads from the synchronous serial port, all without intervention or the execution of the microcontroller.

Microcontroller with a synchronous serial interface and a two-channel

A microcontroller is presented including additional hardware which generates multiple auxiliary address signals needed to expand the memory address space of the microcontroller. The auxiliary address signals allow access to memory locations within external memory devices which would not otherwise be accessible while advantageously maintaining software compatibility with previous microcontroller products. The auxiliary address signals form the most significant bits of augmented addresses, thereby dividing memory locations within the external memory devices into multiple memory banks of equal size. When memory banking is enabled, software instructions select the desired memory bank by writing appropriate values to address bit positions within a memory banking control (MBC) register. The auxiliary address signals are normally produced having values stored within corresponding bit positions of the MBC register. When address signals are generated which correspond to a portion of the memory address space reserved for operating system software, however, the additional hardware modifies the auxiliary address signals such that a selected memory bank is always accessed. As a result, operating system software need only be present in the selected memory bank. This method of generating the auxiliary address signals eliminates the need to duplicate operating system software in each memory bank mapped to a reserved portion of the memory address space, allowing efficient utilization of the external memory devices.

Growing community of inventors

Austin, TX, United States of America

Ronald M Huff