Intel Corporation

Ronald K Minemier

Jon M Dhuse

Abram M Detofsky

Jin Pan

Brent S Crittenden

Brett D Grossman

John Michael Peterson

In accordance with one aspect of the present description, integrated circuits may tested by optically transmitting test data over a light beam in addition to or instead of transmitting the test data using mechanical probes. Optically transmitted test data is detected by a photon detector on board the die to be tested. Individual circuit portions of the die may be tested using test data associated with each individual circuit portion. Other aspects are described.

Optical transmission of test data for testing integrated circuits

In accordance with one aspect of the present description, an interface between an integrated circuit device and a test controller for testing the integrated circuit device includes a plurality of boards coupled together. In one embodiment, the test interface includes a plurality of interchangeable auxiliary boards, each having test circuitry, which may be coupled to a primary board and reused as appropriate to test various integrated circuits. Other aspects are described.

Integrated circuit testing architecture

A computer apparatus includes a first integrated circuit (IC) and a second IC. The second IC includes a soft error rate (SER) immune component and a SER component to detect radiation that could result in soft errors at logic at the first IC.

Detection mechanism

An image sensor may have on-board circuits for detecting defective pixels. In one embodiment of the present invention, high and low values may be determined for pixel intensities. Those pixels that produce intensity values that fall above or below these high and low values respectively, may be determined to be defective during the pixel readout process. In addition, spatial defects may be determined for rows and/or columns. By determining point and/or spatial defects during the pixel readout process, for example using circuitry containing on the image sensor itself, significant economies may achieved in the pixel manufacturing process.

Sensing with defective cell detection

Dark current noise may be compensated for in a digital imaging sensor by measuring the temperature of a silicon diode embedded on the same integrated circuit with the image sensor. This information may be used together with initial dark current calibration information, to provide dark current compensation on the fly during image capture. In some embodiments this may avoid the need for multiple shutter operations or repeatedly capturing a dark frame and then capturing a regular image frame.

Reducing dark current noise in an imaging system

A compound die may be formed of two dies each having face and back sides, said dies being connected with said dies in face to face alignment. A radiation communication system may be used to assist in aligning the dies and in providing communications between the two dies. In this way, a composite structure may be produced which has advanced capabilities, a small footprint, and low impedance.

Stacked die integrated circuit device

A circuit and method are provided for a pad efficient and speed efficient test of column leakage currents in silicon memory devices. Memory circuits are blocked into memory bit planes associated with individual I/O pins. Adequate testing requires that each column in each bit plane be tested for charge leakage characteristics. Rather than switching between I/O pins to test memory blocks associated with given pins, the switching circuitry is implemented on the silicon and is selectively coupled to the outputs of the bit planes on the chip. A single high voltage analog output pin is provided for test observations. This eliminates the need to ramp the testing system's voltages up and down and avoids the problems of hot switching between I/O pins.

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Tempe, AZ, United States of America

Ronald K Minemier