The Boeing Company

Ronald James Koontz

Sean M Ramey

Dick P Wong

Wing Chung Lee

Jason Ellis Sherrill

Arnold W Nordsieck

Murali Rangarajan

Clarke Edgar Moore

Jackson Chia

David Clyde Sharp

David Carl Matthews

Hyunsuk Shin

Wing C Lee

Paul Eugene Denzel

Joshua R Byrne

Anthony S Fornabaio

Paul E Denzel

David C Sharp

Jackson Y Chia

A system, method and computer program product to synchronize processing across multiple lanes. In a system, a synchronizing interface network controller (SINC) communicates with a plurality of processors. Each processor executes an application having thread(s) of operation. Each processor notifies the SINC when a specific thread is ready to perform a respective operation. The SINC releases the processors to perform the respective operation upon being notified by all processors that the specific thread is ready to perform the respective operation. Each processor is configured to monitor for the release of the processors and to also determine whether sufficient time remains within a time window to perform the respective operation. If insufficient time remains, a processor notifies the SINC that the specific thread is no longer ready to perform the respective operation. If the processors are released by the SINC while sufficient time remains, each processor performs the respective operation.

System and method for synchronizing processing between a plurality of processors

A method for synchronizing messages between processors is provided. The method comprising receiving, by a first external device, inbound messages for applications running redundantly in high integrity mode on two or more multi-core processors. The inbound messages are synchronously copied to the multi-core processors. The multi-core processors send outbound messages to respective alignment queues in the first external device or a second external device, wherein the outbound messages contain calculation results from the inbound messages. The first or second external device compares the alignment queues. Matched outbound messages in the alignment queues are sent to a network or data bus. Any unmatched outbound messages in the alignment queues are discarded.

Message synchronization system

A system, method and computer program product synchronize a plurality of processes of one or more applications executed by a plurality of processors. In addition to the processors, the system includes a plurality of memories with each memory associated with a respective process and configured to maintain a local count representative of a message of the respective process with which the memory is associated and at least one remote count representative of a message of a corresponding process executed by another processor. The system also includes a reflector configured to reflect the local count of the respective process to a remote count of the corresponding process. For synchronization, a first process of a first application executed by a first processor is configured to enter a delay period if the local count and at least one remote count maintained by the memory associated with the first process fail to match.

System and method for synchronizing communications between a plurality of processors

A method for managing data transfer for a plurality of processors. Transfer messages exchanged between processor units and an external node in an integrity manager located in hardware in communication with the processor units and the external node are received. An exchange of the transfer messages is managed by the processor units with the external node based on a selected mode in mixed integrity modes such that redundantly calculated outputs from the processor units in a high integrity mode match.

A method for synchronizing processor units. An external synchronizer is communicated with to determine whether an undesired amount of skew is present between a first processor unit and a second processor unit in communication with a synchronization system. The first processor unit is selectively directed to perform an action without generating a needed result such that the undesired amount of skew between the first processor unit and the second processor unit is reduced when the undesired amount of skew is present in the first processor unit. The first processor unit and the second processor unit are associated with each other for a high integrity mode in which integrity checks are performed on corresponding messages generated by the first processor unit and the second processor unit.

Instruction processing alignment system

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Mesa, AZ, United States of America

Ronald James Koontz