Hewlett-packard Company

Agilent Technologies, Inc.

Ronald J Peiffer

John M Heumann

Curtis Alan Tesdahl

Kenneth Paul Parker

David T Crook

Kevin Lee Wible

Thomas F Uhling

John E McDermid

Ed O Schlotzhauer

Kevin W Keirn

Vance R Harwood

Glen E Leinbach

Dayton Norrgard

John J Keller

In one embodiment, voltages are discharged from a circuit under test by, after pins of a circuit tester have been coupled to nodes of the circuit under test, making a first one of the pins an active pin and executing a current discharge process for the active pin. The current discharge process couples a current discharge circuit to the active pin, and then enables the current discharge circuit. A voltage of the active pin is then measured and, if the measured voltage is within a defined window, the active pin is coupled to ground. However, if the measured voltage is outside of the defined window after the current discharge circuit has been enabled for a predetermined period of time, the active pin is marked as not discharged. The current discharged circuit is then disabled and decoupled from the active pin. Thereafter, a next one of the pins is made the active pin, and the current discharged process is caused to be repeated.

Method and apparatus for discharging voltages from a circuit under test

A test access point structure for accessing test points of a printed circuit board and method of fabrication thereof is presented. In an x-, y-, z-coordinate system where traces are printed along an x-y plane, the z-dimension is used to implement test access point structures. Each test access point structure is conductively connected to a trace at a test access point directly on top of the trace and along the z axis of the x-, y-, z-coordinate system above an exposed surface of the printed circuit board to be accessible for electrical probing by an external device.

Printed circuit board test access point structures and method for making the same

Disclosed is a novel method and apparatus for acquiring multiple capacitively sensed measurements from a circuit under test. Multiple digital sources are respectively connected to stimulate multiple respective first ends of multiple respective nets of interest. Respective second ends of the multiple respective nets of interest are capacitively sensed. The respective capacitively coupled signals are digitally sampled and shift correlated with respective expected digital signatures. If a high level of correlation is found for a given net, the net is electrically intact; otherwise, the net is characterized by either an open or some other fault that prevents it from meeting specification.

Capacitive sensor measurement method for discrete time sampled system for in-circuit test

An electronic discharge circuit. The discharge circuit includes a first current source having first current source input and output and a current control circuit having first, second, third, and fourth control contacts. An electronic circuit element of an electronic circuit has first and second element contacts. If first control contact and first current source input are electrically connected, second control contact and first current source output are electrically connected, third control contact and first element contact are electrically connected, and fourth control contact and second element contact are electrically connected, and if the electronic circuit element is electronically charged, current discharging the electronic circuit element is limited to the current from the first current source, otherwise when so connected, current discharging the electronic circuit element is zero and current from the first current source flows into the second control contact and out the first control contact.

System for discharging electronic circuitry

A method of testing series passive components in electronic assemblies. Only one test pin per passive component is required, thereby reducing the cost and complexity of test fixtures and the electronic assemblies. A passive component is connected between the output of a driving circuit and (optionally) an input of a receiving circuit. The output of the driving circuit is placed in a low impedance state. The receiving end of the passive component is stimulated and the response is measured. For reactive components, the stimulus and response are AC. For resistors, multiple DC measurements may be made. A optional DC bias may be provided to limit DC current and to further reduce the small signal output impedance of the driving circuit.

Testing series passive components without contacting the driven node

A method and apparatus for determining whether semiconductor components are electrically connected to a printed circuit board. A voltage (or current) is connected to two traces leading to connections to a semiconductor component to be tested. The initial current (or voltage) is measured at an initial temperature. Then, the temperature of the semiconductor is changed. Current (or voltage) is measured again after the temperature change. A change in current (or voltage) indicates that the semiconductor component is electrically connected to the trace.

Identification of pin-open faults by measuring current or voltage change

A capacitively-coupled amplifier circuit includes an amplifier for receiving an input signal via a coupling capacitance and for amplifying the input signal to produce an output signal. A resistor provides a bias voltage to the amplifier. The resistor is bootstrapped using positive feedback with a loop gain of slightly less than one. The bootstrapping causes an increase in the value of the resistor to lower the cut-in (pole) frequency of the amplifier. The bootstrapping or feedback circuit includes a roll-off (pole) at a frequency below the roll-off (pole) frequency of the amplifier. This prevents phase shift in the feedback loop from adversely effecting the high frequency response of the amplifier. The resulting amplifier circuit exhibits a wide passband and excellent low frequency response despite having a capacitively coupled input signal.

Capacitively-coupled amplifier with improved low frequency response

The invention is a capacitively coupled probe which can be used for non-contact acquisition of both analog and digital signals. The probe includes a shielded probe tip, a probe body which is mechanically coupled to the probe tip, and an amplifier circuit disposed within the probe body. The amplifier circuit receives a capacitively sensed signal from the probe tip and produces an amplified signal in response thereto. The amplifier has a large bandwidth to accommodate high-frequency digital signals. Further, the amplifier has a very low input capacitance and a high input resistance to reduce signal attenuation and loading of the circuit being probed. The amplifier circuit is disposed in the probe body closely adjacent to the probe tip in order to reduce stray and distributed capacitances. A reconstruction circuit reconstructs digital signals from the amplified capacitively sensed signal.

Capacitively-coupled test probe

Disclosed is a system for determining whether semiconductor components are present and properly connected to a printed circuit board. The semi-conductor material between two pins of an integrated circuit forms a lateral NPN transistor, having its base connected directly to the substrate connection pin of the component. A constant voltage source is applied to the lateral transistor collector pin of the component being tested, and allowed to stabilize. A current or voltage source is then connected to the emitter pin of the lateral transistor, typically an adjacent pin, and a current or voltage pulse is applied to this pin. The current on the collector pin is then monitored and if a corresponding current pulse is detected, the emitter and collector pins, as well as the substrate connection pin of the component, are properly connected to the printed circuit board.

Integrated circuit transfer test device system utilizing lateral

An in-circuit test device and method for testing transistors which are connected to various components on a printed circuit board. The present invention uses a fully automated system which provides a constant emitter current to bias the transistor to a predetermined level and prevents the transistor from going into saturation due to variations in the gain of different transistors. The collector lead and base lead are maintained at approximately ground potential so that the collector emitter voltage drop is maintained above the saturation voltage for transistors since the base emitter junction is biased by a constant emitter current placed in the emitter lead. Transistor gain is determined from the difference in two separate d.c. emitter currents which eliminates the effects of parallel impedence paths resulting from other components connected to the transistor on the printed circuit board. An operational amplifier having a feedback resistance is used so that the output voltage is directly proportional to the current flowing through the base of the transistor.

Growing community of inventors

Loveland, CO, United States of America

Ronald J Peiffer