General Electric Company

United States of America as Represented by the Secretary of the Air Force

Ronald J Naster

John A Windyka

Allen Robert Wolfe

Anthony W Jacomb-Hood

William R Cady

Conrad E Nelson

Simon A Zaidel

David R Helms

Ying-Chen Hwang

Mark R Lang

Earl L Parks

Wendell M Kong

Paul D Cooper

Paul A Bourdelais

An electronically reconfigurable digital pad attenuator is disclosed using selectively controlled segmented field effect transistors in a passive, non-gain state as the principal impedance elements. The attenuator may be fabricated in the monolithic microwave integrated circuit (MMIC) format with a segmented gate field effect transistor being connected in each of the separate branches of a Pi pad, Tee pad, or Bridged Tee pad attenuator configuration. The individual FET segments are maintained in a high admittance 'ON' state or a low admittance 'OFF' state in accordance with the binary control potentials applied to the gate of each segment, the principal electrodes being maintained at a zero potential difference. The attenuation then becomes a function of the binary gate potentials applied to each segment and assumes one of a set of well-defined discrete values. The attenuator consumes minimum power, provides attenuation steps that are independent of GaAs MMIC fabrication process tolerances, i.e. lot to lot stable, is wide band, is well matched at input and output terminals, and facilitates setting nominal gain in microwave and millimeter wave subsystems while minimizing transmission phase variations without degrading dynamic range, extending dynamic range in communications receivers, and wide band accuracy in vector modulators.

Electronically reconfigurable digital pad attenuator using segmented

Digital phase shifter bits of predetermined phase shift capability and lumped element network component fabrication arrangement are described. A variety of phase shifter bits including the capability of eleven and one-quarter, twenty-two and one-half, forty-five, ninety, and one hundred eighty degrees of phase shift are included. Also included are a number of high-pass/low-pass and switching transistor inclusive phase shifter bit arrangements. Both electrical schematic diagram and integrated circuit embodiments of the phase shifting networks are also disclosed.

Lumped element digital phase shifter bit

A bidirectional continuously variable phase shifting element is described for incorporation in a monolithic microwave integrated circuit (a circuit which combines both passive and active circuit elements). The preferred active device for use in the phase shifting element is a variable resistance field effect transistor (MESFET), while the preferred passive circuit element is a short transmission line interconnecting the principal electrodes. A variable phase shift for an RF signal passing through the phase shifting element is obtained by adjusting the gate potential of the MESFET between full conduction and nonconduction. The change in conductivity of the MESFET causes the serial impedance of the phase shifting element to vary from a substantially resistive impedance to a substantially capacitively reactive impedance arrangement, which requires only a single active device, is applicable to frequencies generally above 1 GHz, and provides phase shifts up to 45.degree. with reasonable insertion loss and return loss.

Continuously variable phase shifting element comprised of interdigitated

A digital phase bit is provided for microwave operation, comprising a pair of FET switches and at least three transmission lines. The FETs when operated in a digital switching mode, present a small impedance when on and a high impedance when off. Each of two of the transmission lines exhibits a series inductive impedance over the operating frequency band and shunts a FET switch, two shunt combinations being interconnected by the third transmission line. When the switches are on, the signal path is effectively through the FET switch alone (and not branched) and a reference phase shift is produced. When the FET switches are off, a signal applied to the phase bit branches at each shunt combination. The inductive reactance of the transmission line and the capacitive reactance of the FET switch of each shunt combination then jointly produce a resonantly enhanced reactance over the band, causing a reflection and a maximum differential phase shift. The reflections are cancelled at the input port by a suitable choice of length and impedance for the third transmission line. The phase bit is suitable for monolithic fabrication on a common semiconductor substrate and is bidirectional when symmetrical FET switches are used.

Digital phase bit for microwave operation

A fabrication technique for monolithic microwave integrated circuits employs silicon-on-sapphire wafers. Active and passive elements are formed together in a series of implant and deposition steps. Electrically isolated islands of semiconductor material are defined upon the substrate. Multiple metallization deposits are employed to simultaneously interconnect the individual circuit elements and form passive elements upon the integrated circuit. The technique allows mass production of integrated circuits with considerable raw material savings.

Method for fabricating silicon-on-sapphire monolithic microwave

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Liverpool, NY, United States of America

Ronald J Naster