International Business Machines Corporation

Ronald F Hill

Stephen J Nadas

Jeffrey Mark Nick

David Bruce Lindquist

Steven G Glassen

Jeffrey Alan Frey

Michael D Swanson

Geoffrey Owen Blandy

Casper A Scalzi

Moon Ju Kim

Kenneth E Plambeck

Robert S Capowski

David B Emmes

Richard J Schmalz

Matthew A Krygowski

Ambrose A Verdibello, Jr

Allen H Preston

Donald W McCauley

David E Stucki

James R Robinson

Raymond J Pedersen

Neal T Christensen

Frederick J Cox

Thomas O Curlee, Iii

Robert J Bullions, Iii

In a partitioned process environment, storage is reassigned by a shuffle of guest absolute address spaces which may be reassigned among partitions without restriction as to the position of the space to be reassigned relative to the position of the partition to which it is to be assigned. The reassignment is accomplished by adjusting the origin addresses by an adjustment value corresponding to the size of the address space of an additional memory area to be added to a selected partition. Furthermore, the size of the address space of the selected partition is increased by the same adjustment value. The system employs duplicated origin and limit arrays which are used to convert from a partition (guest) absolute address to a system (host) absolute address and uses duplicated configuration arrays by which the system absolute addresses are converted to physical memory addresses. Revised origin and limit information and configuration information is stored in an origin and limit array in the stand by state and in a configuration array in the stand by state. Autonomously operating circuitry is responsive to control signals to temporarily suspend memory commands from the input-output system, to reconfigure the origin and limit arrays and the configuration arrays to enable the system to use the revised information and, thereafter, to resume the processing of memory commands from the input-output system.

Method and apparatus for dynamic storage reconfiguration in a

A method and system for controlling references to system storage. Milli-code mode provides a flexible technique for overriding storage controls associated with referencing system storage of a data processing system. The storage controls to be overridden are not replaced and therefore, a restore of the previous contents of those controls is not necessary. This allows for an increase in system performance and an increase in the efficiency and flexibility of the system. In addition to the above, a system request instruction is provided, which enables flexibility in the manner in which system requests are executed. The flexibility of the system request instruction reduces the number of instructions needed to perform system requests.

Method and system for controlling references to system storage by

Method and apparatus for creating and accessing data objects stored in a portion of the main memory of a data processing system which is inaccessible to programs. The data processing system includes a central processor for executing programs for processing data and a main memory for storing data and programs. The main memory is divided into a program accessible portion and a program inaccessible portion. Vector control objects and vector entries are stored in the program inaccessible portion of the main memory, with each vector entry having states the meaning of which are program defined. Tokens are generated to locate vector control objects in the program inaccessible portion of the main memory. Each vector control object includes a field for pointing to a vector entry for accessing and making observable to the central processor, the contents of a vector entry for indicating the status therein. The present invention also provides for the serialization of access to stored data objects such that the data objects may be released and reused without the possibility of a latent access to an object which is being reused.

Management of data objects used intain state information for shared data

A hardware controlled pipelined processor having an interpretive storage and multiple execution units employs interpretive storage 'milli-instructions' and an interpretive execution 'milli-mode'. Additional hardware controlled instructions that are exclusively used in milli-mode may be added to provide additional controls or to improve performance (they augment the architected instruction set). Milli-mode routines intermingle milli-mode only instructions with architected instructions to implement complex functions. One milli-instruction called the DRAIN INSTRUCTION PIPELINE (DIP) causes the pipeline to drain selectively so the milli-programmer determines when and and what type of pipeline drain to perform. A DRAIN INSTRUCTION PIPELINE causes suspension of decoding until a selected event occurs. This DIP instruction includes options for suspending decoding until one of the following events have occurred: 1. all conceptually previous macro-instructions have completed; 2. all conceptually previous instructions have completed; 3. all store requests have reached the point where no exceptions would occur, but the actual store may not have completed; 4. all conceptually previous stores from all conceptually previous units-of-operation have competed (serialize); or 5. invalidate instruction buffers and fetch the next sequential macro-instructions.

Computer system permitting switching between architected and

A single non-privileged instruction copies a page of data from a source virtual address in an electronic medium to a destination virtual address in the same or in a different electronic storage medium, and without the intervention of any supervisory program when each medium and the virtual addresses are previously determined. The instruction is not required to specify which medium it will use, does not require its user to know what backing medium it will access, does not require main storage (MS) to be its backing medium, and allows different types of physical addressing to be used by different media. The instruction can lock any page for use in a multi-processor (MP). No physical direction of data movement is provided within the non-privileged machine instruction, which only designates virtual direction of movement. The separation of virtual direction from physical direction is done by avoiding instruction control over selection of electronic media. The non-privileged instruction can nevertheless express a preference for obtaining a copy of the destination page in an electronic medium in which the content of the page can be processed by further instructions. Also, the instruction can cause invocation of a privileged control program to avoid the need for a following condition code test instruction. A privileged instruction is also provided to wait for the completion of the unprivileged instruction and to invalidate a non-MS medium page whether it is unlocked or locked, either correctly or incorrectly.

Process using virtual addressing in a non-privileged instruction to

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Wappingers Falls, NY, United States of America

Ronald F Hill