Motorola Corporation

Semiconductor Components Industries, LLC

Ronald E Thomas

George W Hawkins

Israel A Lesk

Prosanto K Mukerji

Rajesh Srinivasan

Colin B Bosch

Michael S Lebby

Michael John Seddon

Michael B McShane

Davis H Hartman

James H Knapp

James J Casto

Peter J Gillespie

Laura J Norton

David Galloway

James M Rugg

William L Hunter

A semiconductor component includes a semiconductor chip (,) having first and second surfaces opposite each other, a semiconductor device (,) in the semiconductor chip (,), and a flexible substrate (,) packaging the semiconductor chip (,).

Flexible substrate for packaging a semiconductor component

A method of manufacturing a semiconductor component includes applying an encapsulant (211) to a wafer (210, 430), degassing the encapsulant (211), and separating the wafer (210, 430) into a plurality of semiconductor components. Manufactured in this manner, the encapsulant (211) of the semiconductor component is substantially devoid of air bubbles and voids.

Semiconductor component and method of manufacture

A waveguide (12) having a core region (16) and a cladding region (20) is formed. A portion of the cladding region (20) forms a first surface (21) and portions of both the core region (16) and the cladding region (20) forms an end surface (15). An insulative flexible substrate (14) having an electrically conductive tracing (32) with a first portion and a second portion, wherein the first portion of the insulative flexible substrate (14) is mounted on the end surface of the waveguide (12).

Optoelectronic interconnect device and method of making

An improved semiconductor die for plastic encapsulated semiconductor device packages which impedes the inherent delamination caused by the differing expansion coefficients of the semiconductor die and plastic encapsulation. Rounded or tapered die corners and die edges decrease the stress from the plastic encapsulation that acts upon the semiconductor die. This reduced stress slows the delamination progression and leaves the operational circuitry unaffected for an increased period of time thereby increasing device lifetime.

Semiconductor die having rounded or tapered edges and corners

An improved semiconductor die for plastic encapsulated semiconductor devices which impedes the inherent delamination caused by the differing expansion coefficients of the semiconductor die and plastic encapsulation. Topological configurations are processed in the die corners of the semiconductor die which are void of circuitry. The topological configurations act as barriers and slow the delamination progression. This leaves the operational circuitry unaffected for an increased time thereby increasing device lifetime.

Die corner design having topological configurations

A molded semiconductor package having a flagless leadframe wherein a semiconductor die is disposed in or above a die opening of a leadframe. This allows for thin, symmetrical packages and packages having a minimum number of material interfaces to be manufactured because no leadframe flags and minimal die bond material are employed. The present invention further includes guard rings to protect high stress areas of the semiconductor die from damage and heat spreaders to more effectively spread heat dissipated by the semiconductor die.

Flagless semiconductor package

A semiconductor die for plastic encapsulation having an adhesion promoter selectively disposed on an outer surface enabling better adhesion between the semiconductor die and a plastic encapsulation. The improved adhesion allows for less relative motion between the semiconductor die and the plastic encapsulation. The reduction of relative motion significantly decreases the delamination progression throughout the semiconductor device and allows for an increased semiconductor device lifetime.

Growing community of inventors

Tempe, AZ, United States of America

Ronald E Thomas