Western Digital Technologies, Inc.

Via Technologies, Inc.

National Semiconductor Corporation

Exar Corporation

Lepower Semiconductor Inc.

Ronald Chang

John Thomas Contreras

Bernhard E Knigge

Joey Martin Poss

Wei Gao

Sheng Yen

Jose Antonio Salcedo

Chin-Chi Chang

Raphael Horton

Chung-Kuang Huang

Various illustrative aspects are directed to a data storage device comprising a slider with a resistive temperature detector (RTD) having a first resistance electrically connected to a first amplifier and a plurality of controlled current sources and switches, and one or more processing devices configured to: control the switches to generate an alternating-bias signal having a first clock frequency for biasing the first resistance, modulate an input signal of the first amplifier using the first clock frequency to generate a modulated signal, demodulate an amplified modulated signal at an output of a second amplifier using the first clock frequency to generate a resistance detection signal, the second amplifier coupled to the first amplifier, and process the resistance detection signal to determine the first resistance and/or a change in value of the first resistance.

Alternating-bias signal resistance detection for resistive temperature detectors in disk drives

Various illustrative aspects are directed to a data storage device comprising a slider with a resistive temperature detector with a first resistance, a resistance detection circuit electrically coupled to the first resistance and comprising a low and high frequency path corresponding to a DC and AC mode, respectively, and one or more processing devices configured to: bias the first resistance with a voltage bias, where the first resistance is coupled to a first and second amplifier, control a pulse generator to add a bias pulse on the HF path to generate a HF resistance detection signal, where the second amplifier is biased using the voltage bias and the bias pulse, control a clock to chop a LF signal at the first amplifier on the LF path, demodulate the chopped LF signal to generate a LF resistance detection signal, and concurrently process the HF and LF resistance detection signals.

Continuous dual path resistance detection for resistive temperature detectors in disk drives

The present invention relates to methods for LED driver applications, comprising the steps: providing an input voltage, V; generating an output voltage, V, for driving a plurality of LED channels, wherein a boost converter is used to convert the input voltage Vto the output voltage V; determining a lowest voltage, V, from the LED channels; generating a comparator voltage, V, by comparing the lowest voltage of the channels, V, with a feedback reference voltage, V, wherein the feedback reference voltage, V, and a LED current, I, for the LED channels are determined by a current I; generating a summed voltage, V, for stabilizing the output voltage, V; and generating a PWM voltage, V, as a function of the Vand the Vto control the output voltage, V.

Methods and circuits for LED drivers and for PWM dimming controls

A frequency synthesizer with a single PLL and multiple SSB mixers is presented. The frequency synthesizer includes a single PLL outputting a reference signal that is fed to a plurality of dividers coupled in sequence. The outputs from the dividers are mixed by the SSB mixers to produce signals with different frequencies. These signals with different frequencies can be selected through use of multiple selectors.

Ultra wideband and fast hopping frequency synthesizer for MB-OFDM wireless application

An analog-to-digital converter which has a low resolution and high resolution mode. In response to the low resolution mode signal, a switching circuit selects only certain of the digital bit outputs. In one embodiment, the analog-to-digital converter is a pipelined circuit with a number of stages. In response to the low resolution mode, a number of the stages are bypassed, so that only the needed stages for the smaller number of bits are used. The stages that are bypassed are preferably powered down, but not completely. By maintaining a small amount of bias current to the bypassed stages, they can quickly respond when a switch is made back to full resolution mode.

Programmable power consumption pipeline analog-to-digital converter with variable resolution

A track and hold circuit is disclosed which may be used in high speed analog to digital conversions. The circuit includes a control transistor which keeps the circuit's input transistor in a conductive state even when the circuit is in hold mode. As a result, the track and hold circuit achieves a high switching speed while minimizing input voltage spikes.

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Fremont, CA, United States of America

Ronald Chang