Chartered Semiconductor Manufacturing Ltd (Corporation)

Ron Lopez

Wen-Zhan Zhou

Goswami Indranil

Teng Hwee Ng

Hui-Kow Lim

The present invention relates to a test structure which is formed on a reticle simultaneously with a pattern that will be used to build an integrated circuit device. The test structure comprises a large rectangular end and several rectangular shapes that extend from one side of the rectangular end in a parallel array. The width of the rectangular shape extensions is equal to the spacing between them and is the same as the width of the minimum feature size in the lithographic process to be monitored. A CD SEM is used to measure the edge width of the convex and concave sections of the structure as printed in photoresist at various focus settings and a plot of edge width vs. focus setting is generated. The intersection of the lines representing the convex section and concave section measurements indicates the best focus setting for the lithographic process.

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Singapore, Singapore

Ron Lopez