Avago Technologies General IP (singapore) Pte. Ltd.

Ron Daniel Isliefson

Myron Buer

Nick Thomas Hendrickson

In some aspects, the disclosure is directed to methods and systems for sense reference generation. A first array and a second array of MTJ based cells are configured as a magnetoresistive random access memory block. The first array is matched to the second array, the first array and the second array each including rows of MTJ based cells for storing data bits. Responsive to a first row of MTJ based cells in the first array being selected for at least a first stored data bit to be read, a reference row of MTJ based cells in the second array is connected to at least a first comparator of a plurality of comparators via reference lines, to provide sense reference for determining a value of the first stored data bit. The reference lines are shorted together prior to connecting to a first input of the first comparator.

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Lakeville, MN, United States of America

Ron Daniel Isliefson