Stmicroelectronics S.r.l.

Ovonyx Inc.

Micron Technology Incorporated

Romina Zonca

Fabio Pellizzer

Roberto Bez

Marina Tosi

Caterina Riva

Giorgio De Santi

Maria Santina Marangon

Mauro Alessandri

Barbara Crivelli

A process forms a phase change memory cell using a resistive element and a memory region of a phase change material. The resistive element has a first thin portion having a first sublithographic dimension in a first direction; and the memory region has a second thin portion having a second sublithographic dimension in a second direction transverse to the first dimension. The first thin portion and the second thin portion are in direct electrical contact and define a contact area of sublithographic extension. The second thin portion is delimited laterally by oxide spacer portions surrounded by a mold layer which defines a lithographic opening. The spacer portions are formed after forming the lithographic opening, by a spacer formation technique.

Phase change memory cell and manufacturing method thereof using minitrenches

A process for manufacturing a non-volatile memory cell having at least one gate region, the process including the steps of depositing a first dielectric layer onto a semiconductor substrate; depositing a first semiconductor layer onto the first dielectric layer to form a floating gate region of the memory cell; and defining the floating gate region of the memory cell in the first semiconductor layer. The process further includes the step of depositing a second dielectric layer onto the first conductive layer, the second dielectric layer having a higher dielectric constant than 10. Also disclosed is a memory cell integrated in a semiconductor substrate and having a gate region that has a dielectric layer formed over a first conductive layer and having a dielectric constant higher than 10.

Manufacturing process of a semiconductor non-volatile memory cell

The process for forming a film of TiSiN includes the following sequence of steps: deposition of a TiN film at medium temperature, for example, 300-450&#xb0; C., by thermal decomposition of a metallorganic precursor, for example TDMAT (Tetrakis Dimethylamino Titanium); exposition to a silicon releasing gas, such as silane (SiH) and dichlorosilane (SiHCl) at 10-90 sccm&#x2014;standard cube centimeters per minute&#x2014;for a quite long time, for example, longer than 10 s but less than 90 s, preferably about 40 s; exposition to a H/Nplasma at 200-800 sccm, for 10-90 s, preferably about 40 s.

Process for forming a thin film of TiSiN, in particular for phase change memory devices

A contact structure, including a first conducting region having a first thin portion with a first sublithographic dimension in a first direction; a second conducting region having a second thin portion with a second sublithographic dimension in a second direction transverse to said first direction; the first and second thin portions being in direct electrical contact and defining a contact area having a sublithographic extension. The thin portions are obtained using deposition instead of lithography: the first thin portion is deposed on a wall of an opening in a first dielectric layer; the second thin portion is obtained by deposing a sacrificial region on vertical wall of a first delimitation layer, deposing a second delimitation layer on the free side of the sacrificial region, removing the sacrificial region to form a sublithographic opening that is used to etch a mold opening in a mold layer and filling the mold opening.

Small area contact region, high efficiency phase change memory cell and fabrication method thereof

A vertical-current-flow resistive element includes a monolithic region having a first portion and a second portion arranged on top of one another and formed from a single material. The first portion has a first resistivity, and the second portion has a second resistivity, lower than the first resistivity. To this aim, a monolithic region with a uniform resistivity and a height greater than at least one of the other dimensions is first formed; then the resistivity of the first portion is increased by introducing, from the top, species that form a prevalently covalent bond with the conductive material of the monolithic region, so that the concentration of said species becomes higher in the first portion than in the second portion. Preferably, the conductive material is a binary or ternary alloy, chosen from among TiAl, TiSi, TiSi, Ta, WSi, and the increase in resistivity is obtained by nitridation.

Integrated resistor, phase-change memory element including this resistor, and process for the fabrication thereof

The phase change memory cell is formed by a resistive element and by a memory region of a phase change material. The resistive element has a first thin portion having a first sublithographic dimension in a first direction; and the memory region has a second thin portion having a second sublithographic dimension in a second direction transverse to the first dimension. The first thin portion and the second thin portion are in direct electrical contact and define a contact area of sublithographic extension. The second thin portion is delimited laterally by oxide spacer portions surrounded by a mold layer which defines a lithographic opening. The spacer portions are formed after forming the lithographic opening, by a spacer formation technique.

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Paullo, Italy

Romina Zonca