Diodes Fabtech, Inc.

Diodes Inc.

Roman Hamerski

Timothy S Eastman

Christopher Daniel Hruska

Chris Hruska

Zerui Chen

Jonathan Moult

James Man-Fai Hong

Johnny Duc Van Chiem

Fazia Hossain

A titanium-nickel-palladium solderable metal system for silicon power semiconductor devices (), which may be used for one or both of the anode () or cathode (). The metal system includes an outer layer of palladium (), an intermediate layer of nickel (), and an inner layer of titanium (). For certain applications, the nickel may be alloyed with vanadium. The metal system may be deposited on bare silicon () or on one or more additional layers of metal () which may include aluminum, aluminum having approximately 1% silicon, or metal silicide. The use of palladium, rather than gold or silver, reduces cost, corrosion, and scratching.

Top tri-metal system for silicon power semiconductor devices

In one embodiment the present invention includes a semiconductor rectifier device comprising a first, second, and third semiconductor regions and a gate. The first semiconductor region is of a first conductivity type. The second semiconductor region is adjacent to the first semiconductor region which has a second conductivity type. The third semiconductor region is adjacent to the second semiconductor region which has the second conductivity type. The gate is proximate to but insulated from the second semiconductor region and electrically coupled to the third semiconductor region. When the first semiconductor region is biased in a first direction, an inversion region forms in the second semiconductor region. The inversion region forms a forward-biased tunnel diode junction with the third semiconductor region. When the first semiconductor region is biased a second direction, the semiconductor rectifier device functions as a reverse-biased PIN diode.

Power rectifiers and method of making same

A high-efficiency power semiconductor rectifier device () comprising a &#x3b4;P++ layer (), a P-body (), an N-drift region (), an N+ substrate (), an anode (), and a cathode (). The method of fabricating the device () comprises the steps of depositing the N-drift region () on the N+ substrate (), implanting boron into the N-drift region () to create a P-body region (), forming a layer of titanium silicide () on the P-body region (), and concentrating a portion of the implanted boron at the interface region between the layer of titanium silicide () and the P-body region () to create the &#x3b4;P++ layer () of supersaturated P-doped silicon.

High efficiency rectifier

A rectifier device () comprising a multi-layer epitaxial film () and a rectifier and a transistor manufactured in the film (), wherein the transistor is oriented vertically relative to the plane of the rectifier. The rectifier and transistor are separated by a transition zone of inverted bias. The rectifier is a Schottky barrier rectifier, and the transistor is a JFET. More specifically, the device () comprises the film (), a trench (), a first region () associated with an upper portion of the trench (), and second region () associated with a lower portion. The interface between the p+ material of the second region () and the n material of the film () creates a p+/n junction. The device () has use in high frequency, low-loss power circuit applications in which high switching speed and low forward voltage drop are desirable.

Growing community of inventors

Overland Park, KS, United States of America

Roman Hamerski