Commissariat &#xc0; L'&#xc9;nergie Atomique Et Aux &#xc9;nergies Alternatives

Université Grenoble Alpes

Cnrs

Isorg

France T&eacute;l&eacute;com

Fahrenheit Thermoscope LLC

Romain Gwoziecki

Thomas Skotnicki

Philippe Coronel

Thierry Baron

Mohamed Benwadih

Christophe Premont

Charlotte Gillot

Romain Coppard

Antoine Latour

Gwenaël Le Rhun

Marine Galliari

Stéphanie Jacob

Maxime Legallais

Marc Plissonnier

Bassem Salem

Gennie Garnier

A method for producing an aluminium nitride (AlN)-based layer on a structure with the basis of silicon (Si) or with the basis of a III-V material, may include several deposition cycles performed in a plasma reactor comprising a reaction chamber inside which is disposed a substrate having the structure. Each deposition cycle may include at least the following: deposition of aluminium-based species on an exposed surface of the structure, the deposition including at least one injection into the reaction chamber of an aluminium (Al)-based precursor; and nitridation of the exposed surface of the structure, the nitridation including at least one injection into the reaction chamber of a nitrogen (N)-based precursor and the formation in the reaction chamber of a nitrogen-based plasma. During the formation of the nitrogen-based plasma, a non-zero polarisation voltage Vmay be applied to the substrate.

Method for producing a layer of aluminum nitride (ALN) on a structure of silicon or III-V materials

A voltage transformer including a beam or membrane made of a first polymer material having a resonance frequency in the range from 1 Hz to 1,000 Hz and including on the beam or membrane a stack successively including: a first electrode; a first piezoelectric layer made of a second polymer material; a second electrode; a second piezoelectric layer made of a third polymer material identical to the second polymer material or different from the second polymer material; and a third electrode.

Piezoelectric transformer

A semiconductor device includes a substrate; a semiconductor structure arranged on the substrate, the semiconductor structure including at least one first semiconductor layer; an insulator layer arranged on the semiconductor structure; a field plate covering a part of the insulator layer, wherein the insulator layer includes a non-linear dielectric material having a permittivity that decreases as an electric field traversing the dielectric material increases.

Field plate semiconductor device

A method for making a matrix device including a matrix of photodetecting or photoemitting elements, the method including designing operations for: a) identifying, from at least one topology of the matrix device, one or more spurious conducting closed circuits; b) selecting at least one photodetecting or photoemitting element of the matrix device belonging to at least one of the spurious conducting closed circuits identified, the at least one element selected being made inactive.

Method for designing an array of organic photodetector or photoemitter elements

The organic memory device is a double-gate transistor that successively comprises a first gate electrode, a first gate dielectric, an organic semi-conductor material, a second gate dielectric and a second gate electrode. Source and drain electrodes are arranged in the organic semiconductor material and define an inter-electrode surface. A trapping area is arranged between the organic semiconductor material and one of the gate electrodes and is in electric contact with one of the gate electrodes or the organic semi-conductor material. The trapping area is at least facing the inter-electrode surface.

Organic dual-gate memory and method for producing same

A microelectronic device includes a plurality of disconnected similar semiconducting portions, electrically isolated from each other and forming a semiconductor layer, at a spacing by a constant distance and with a shape parallel to the other portions. The microelectronic device also includes two electrodes arranged in contact with the semiconductor layer such that a maximum distance separating the two electrodes is less than the largest dimension of one of the semiconductor portions. The shape and dimensions of the semiconductor portions, the spacing between the semiconductor portions, the shape and dimensions of the electrodes and the layout of the electrodes relative to the semiconductor portions are such that at least one of the semiconductor portions electrically connects the two electrodes to each other. The largest dimensions of the semiconductor portions are perpendicular to the largest dimension of the electrodes, the electrodes being similar.

Microelectronic device with disconnected semiconductor portions and methods of making such a device

A semiconductor device may include a channel region formed between a source and a drain region. One or more first pockets may be formed in the channel region adjacent to junctions. The first pockets may be doped with a dopant of the first conductivity type. At least one second pocket may be formed adjacent to each of the junctions and stacked against each of the first pockets. The second pocket may be doped with a dopant of a second conductivity type such that the dopant concentration in the second pocket is less than the dopant concentration in the first pockets. The second pocket may reduce a local substrate concentration without changing the conductivity type of the channel region.

Semiconductor device with compensated threshold voltage and method for making same

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Grenoble, France

Romain Gwoziecki