Globalfoundries U.S. Inc.

Romain Feuillette

David C Pritchard

Hong Yu

Alain F Loiseau

Navneet Jain

Hongru Ren

Elizabeth Strehlow

James Mazza

Heather Lazar

Peter Coutu

Galla Kiran Kumar

Brenda Lanza

Structures for a memory device and methods of forming a structure for a memory device. The structure comprises a first transistor including a first gate structure and a first source/drain region, a second transistor including a second gate structure and a second source/drain region, and a capacitor including a first capacitor plate directly coupled to the first source/drain region, a second capacitor plate, and a capacitor dielectric layer between the first capacitor plate and the second capacitor plate.

Memory device structures that include a capacitor

Structures with features formed by self-aligned double patterning and methods of self-aligned multiple patterning. The structure comprises a first field-effect transistor including a first gate and a first protrusion projecting laterally from the first gate, and a second field-effect transistor including a second gate and a second protrusion projecting laterally from the second gate. The second gate and the second protrusion are spaced in a lateral direction from the first gate and the first protrusion. The structure further comprises a gate contact connecting the first protrusion of the first gate to the second protrusion the second gate.

Self-aligned double patterning with mandrel manipulation

Structures for an integrated circuit having a watermark and related methods. The structure comprises a first semiconductor structure including at least one feature with a variation relative to a second semiconductor structure including the at least one feature without the variation. The variation provides a watermark for identifying a Process Design Kit used to form the first semiconductor structure.

Integrated circuit structures having a watermark

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Williston, VT, United States of America

Romain Feuillette