U.S. Philips Corporation

Rolf D Gutsmann

Walter H Demmer

Otto L Warmuth

Jurgen Lenth

Ingolf B Heinemann

Norbert A Bergs

For determining the half-cycle durations of the input signal which is presented as a sequence of sampled values, its zero crossings are approximated by lines which interconnect the two sampled values of different signs on both sides of the zero crossing. The half-cycle duration is derived from the number of sampled values within a period, i.e. between two consecutive zero crossings, and from the time intervals at the beginning and end of each half-cycle determined by the intersection of the approximation line with the axis. The time intervals at the beginning and end of each period are corrected for a more accurate determination of the duration and the time intervals during which the values of the individual half-cycle durations are stored, are made to approximate to these half-cycle durations. The instantaneous frequency of the input signal is determined from the values of the half-cycle durations which have thus been shifted in time by forming the reciprocal.

FM Demodulator using interpolation to approximate zero crossings

A frequency-modulated input signal is converted at an adequately high sampling rate into a time-discrete and amplitude-discrete digital signal. This digital signal is applied to a simple transversal filter, having a sloping amplitude characteristic, more specifically having a sin.sup.2 transfer function and a constant group delay time, and to a delay device having a time delay which is equal to the group delay time. The output signal of the filter is applied to a numerator input of a divider (6) and the output signal of the delay device to a denominator input the divider (6) whose quotient contains the frequency corresponding to the amplitude characteristic of the filter. In this manner, a frequency demodulator having a very good AM-suppression and an adequate linearity at broad-band-FM is realized. The divider is formed, in accordance with the 'pipeline principle', from a plurality of identically constructed sections corresponding to the number of bit positions of the processed digital signals. As a result thereof a sufficiently high processing speed can be accomplished with very little cost. A correction circuit is provided to avoid faults and inaccuracies, respectively, in the case of small denominators.

Growing community of inventors

Hamburg, Germany

Rolf D Gutsmann