Fraunhofer-gesellschaft Zur Foerderung Der Angewandten Forschung E.v.

Other

Pac Tech - Packaging Technologies Gmbh

Smart Pac Gmbh Technology Services

Bundesdruckerei Gmbh

Rolf Aschenbrenner

Elke Zakel

Paul Kasulke

Andreas Ostmann

Ghassem Azdasht

Joerg Fischer

Frank Ansorge

Hans-Hermann Oppermann

Lothar Dietrich

Joachim Eldring

Joachim Kloeser

Jorg Gwiasda

Gerald Motulla

The present invention relates to a method of producing a contactless chip card. In a first step of the method, a card body with one or a plurality of recesses on one card body side is produced from a theremoplastic material, preferably by injection moulding. Bumps being formed on the base surface of the recesses. Subsequently, conductor tracks corresponding to a coil as a conductor track pattern are impressed directly onto surface areas of the card body side including the recesses using a hot impressing technique. The conductor tracks are impressed especially also onto surface areas inside the recesses such that same extends across the bumps. One or a plurality of chips are then aligned in the recesses and contacted with the conductor tracks in the recesses which extend across the bumps. The method according to the present invention is advantageous insofar as it permits a simple production of a chip card, which requires only a few method steps and is therefore also economical. Furthermore, such a chip card is both mechanically stable and reliable, since it comprises very few individual layers and since the conductor tracks of the coil are applied directly to the card body.

Method for producing contactless chip cards and corresponding contactless chip card

An electronic contacting method for contacting a chip having a plurality of conductive contact areas, which are not provided with an additional metallization layer, a carrier substrate is provided, which has a first surface having arranged thereon a plurality of conductive connecting sections. A non-conductive adhesive layer is arranged on the first surface of the carrier substrate and subsequently, the carrier substrate is aligned with a chip to be contacted in such away that a plurality of conductive contact areas on said chip to be contacted is in alignment with the connecting sections on the first surface of said carrier substrate. Then the carrier substrate is connected to the chip to be contacted by means of the adhesive layer in such a way that the connecting sections of the carrier substrate and the contact areas of the chip abut on one another by means of pressure contact, without any intermetallic connection being established.

Contact-bumpless chip contacting method and an electronic circuit produced by said method

The present invention relates to a method of forming a structured metallization on a semiconductor wafer, wherein a main surface of the wafer has a passivation layer applied thereto, which is structured so as to determine at least one bond pad. Initially, a metal bump is produced on the at least one bond pad. An activated dielectric is then produced on the areas of the passivation layer on which the structured metallization is to be formed. Finally, metal is chemically deposited directly on the activated dielectric and on the metal bump in such a way that the structured metallization formed on the activated dielectric and the metal chemically deposited on the metal bump are electro-conductively joined.

Method for forming a structured metallization on a semiconductor wafer

Method and apparatus for the testing of substrates which are provided with a wiring structure, in particular, chips (,), in conjunction with which, by means of a solder-deposit carrier (,) which is provided with a structured, electrically conductive coating (,) with bond pads (,) for the arranging of solder deposits (,) and their transfer to correspondingly arranged bond pads (,) of a substrate (,), an electrical check of the wiring structure of the substrate (,) takes place during the transfer of the solder deposits (,).

Method and apparatus for testing chips

Chip-contacting method requiring no contact bumps, and electronic

Method for the preparation of electrodeposited or galvanically deposited bumps for the bonding of integrated circuits, characterized by two subsequent metal depositions, deposited without an external current source (chemical metal deposition) on a metallization 1, the first deposition being thicker than the second and the second deposition being more even or more regular throughout a large area than the first one.

Method for galvanic forming of bonding pads

Flip chip bonding with non conductive adhesive

Solder bump for flip chip assembly and method of its fabrication

Growing community of inventors

Berlin, Germany

Rolf Aschenbrenner