L-3 Communications Corporation

Roland Richard Henrie

Osama Sami Haddadin

Brad Terry Hansen

L Andrew Gibson

David S Nelson

DeLon K Jones

LeRoy A Gibson

A block polyphase filter is constructed of a set of filter blocks having different filter functions, and being arranged for parallel processing of portions of an input sequence of signals. Signals of the input sequence are divided among the blocks by a demultiplexer for processing at a clock frequency lower than a clock frequency of the input signal sequence. The filter blocks are arranged in groups, wherein output signals of the blocks in any one group are summed to produce an output signal of the filtered group. Output signals of all of the filter groups are multiplexed to provide an output signal sequence wherein the repetition frequency of the signals may be higher, lower, or equal to the repetition frequency of the input signal sequence depending upon the ratio of the number of filter groups to the number of filter blocks in the set of filter blocks.

Parallel filter realization for wideband programmable digital radios

A demodulator, suitable for use in a communication system and in a modem, has a block polyphase circuit with circuit blocks for different signal processing functions, particularly filtering, delay, and frequency conversion. The circuit blocks are arranged for parallel processing of different portions of an input sequence of signals. Signals of the input sequence to be filtered are divided among the blocks by a demultiplexer for processing at a clock frequency lower than a clock frequency of the input signal sequence. Signals outputted by groups of the circuit blocks are summed to produce an output signal of the group. Output signals of all of the groups are multiplexed to provide an output signal sequence such that the repetition frequency of the outputted signals may be higher, lower, or equal to that of the input signal sequence. This enables use of programmable circuitry operative at reduced clock rates.

Parallel DSP demodulation for wideband software-defined radios

A system for fast forward error correction coding and decoding is provided. The system includes a transmitting device having a data source and a forward error correction (FEC) encoder. The FEC is coupled to the data source and is adapted to encode packetized data from the data source. A channelizer is coupled to the at least one FEC encoder and is adapted to interleave the FEC encoded packetized data among a plurality of communication channels. The system also includes a receiving device adapted to receive the plurality of communication channels. The receiving device includes a dechannelizer, adapted to de-interleave the plurality of communication channels and a FEC decoder to reconstituted the packetized data.

Growing community of inventors

Provo, UT, United States of America

Roland Richard Henrie