Texas Instruments Corporation

Roland Ribeiro

Yongseon Koh

Amit Rane

Horia Giuroiu

Manu Basil

Mohan Yang

Leung Kin Chiu

A system includes a differential clock source configured to provide a reference clock signal and an inverted version of the reference clock signal. The system also includes a quadrature clock source configured to provide a quadrature clock signal that is phase-shifted relative to the reference clock signal. The system also includes a differential sensing circuit coupled to the differential clock source and the quadrature clock source. The differential sensing circuit is configured to determine skew of the quadrature clock signal based on the reference clock signal, the inverted version of the reference clock signal, and the quadrature clock signal.

Differential sensing circuit for clock skew calibration relative to reference clock

A system includes a pseudo-differential clock path configured to convey a first clock signal and a second clock signal, wherein the second clock signal is inverted relative to the first clock signal. The system also includes a sensing circuit coupled to sensing nodes of the pseudo-differential clock path. The sensing circuit is configured to provide a sense signal based on a comparison of the first clock signal and the second clock signal at the sensing nodes. The system also includes a correction circuit coupled to the sensing circuit and to adjustment nodes of the pseudo-differential clock path. The correction circuit is configured to adjust the first clock signal and the second clock signal using digital-to-analog converters (DACs) and the sense signal.

Duty-cycle calibration based on differential clock sensing

A quadrature clock skew calibration circuit includes an I-Q clock generator having an input coupled to receive a first clock signal. The I-Q clock generator generates an in phase (I) clock signal and a quadrature (Q) clock signal. The quadrature clock skew calibration circuit includes an I-Q skew sensor having a first input coupled to receive the I clock signal and having a second input coupled to receive the Q clock signal. The I-Q skew sensor generates an I-Q skew signal responsive to a skew between the I and Q clock signals. The quadrature clock skew calibration circuit includes a control circuit having a first input coupled to receive the I-Q skew signal and having a second input coupled to receive a second clock signal. The control circuit varies the duty cycle of the first clock signal responsive to the I-Q skew signal and the second clock signal.

Quadrature clock skew calibration circuit

One example includes a system that is comprised of an equalizer, a counter, and a controller. The equalizer equalizes an incoming signal and provide an equalized output signal over a plurality of time intervals according to a given equalizer setting thereof. The counter provides a count value to represent to a number of times that the equalized output signal crosses each of a plurality of thresholds over the plurality of time intervals. The controller evaluates the count value for each of the plurality of thresholds at each of a plurality of equalizer settings and configures the equalizer setting based on the evaluation of the count values for each of the equalizer settings.

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Roland Ribeiro