International Business Machines Corporation

Roland Frech

Erich Klink

Thomas-Michael Winkel

Jochen Supper

Bernd Garben

Wiren Dale Becker

Martin Eckert

Otto Andreas Torreiter

Hubert Harrer

Jurgen Saalmuller

Bruce John Chamberlin

Andreas Huber

Joseph Curtis Diepenbrock

George A Katopis

William Frederick Shutler

Dierk Kaller

Claudio Siviero

Stefano Sergio Oggioni

Dieter F Wendel

Wai Mon Ma

Ulrich Weiss

Gerald J Fahr

Helmut H Weber

Dietmar Schmunkamp

Simone Rehm

Andreas Rebmann

Helmut Virag

Jürgen Saalmüller

A method for determining current return path integrity in an electric device with a plurality of signal lines and supply lines. A library with at least one reference signal pattern of a near end crosstalk signal on a defined signal line arising from an input signal on another defined signal line is provided, a predetermined signal to a selected signal line of the electric device is applied, the near end crosstalk signal on at least one further signal line of the electric device is detected, said near end crosstalk signal is compared with the corresponding reference signal pattern from the library, and if there is a deviation between the near end crosstalk signal and the corresponding reference signal pattern, an information that there is any defect in the electric device is displayed.

Determining the current return path integrity in an electric device connected or connectable to a further device

A method for determining power consumption of a power domain within an integrated circuit is presented. In a first step, a local power supply impedance profile (Z(f)) of this power domain is determined. Subsequently, a local time-resolved power supply voltage (U(t)) is measured while a well-defined periodic activity is executed in power domain. A set of time-domain measured voltage data (U(t)) is thus accumulated and transformed into the frequency domain to yield a voltage spectrum (U(f)). A current spectrum I(t) is calculated from this voltage profile (U(f)) by using the power supply impedance profile Z(f) of this power domain as I(t)=F{U(f)/Z(f)}. Finally, a time-resolved power consumption spectrum P(t) is determined from measured voltage spectrum U(t)) and calculated current spectrum (I(t)). This power consumption (P(t)) may be compared with a reference (P(t)) to verify whether power consumption within power domain matches expectations.

Measuring power consumption in an integrated circuit

Network power fault detection. At least one first network device is instructed to temporarily disconnect from a power supply path of a network, and at least one characteristic of the power supply path of the network is measured at a second network device connected to the network while the at least one first network device is temporarily disconnected from the network.

Network power fault detection

A system for measuring a test voltage level (V) in a location within a chip is presented. The system includes an on-chip measurement device with an on-chip comparator and an on-chip storage. The on-chip comparator is configured for comparing the test voltage (V) to be measured to a reference voltage (V), while the on-chip storage is configured for storing the result of this comparison. The system also includes external (off-chip) equipment for generating the reference voltage (V), for generating probe signals for probing the state of the storage and for retrieving the state of said on-chip storage.

Determining local voltage in an electronic system

A method and system for performing a self-test of power supply quality for an integrated circuit chip within an electronic system. The electronic system is subjected to a well-defined repetitive activity, such as by using an amplitude modulated system clock tree. With the repetitive activity causing current consumption within the chip, time-domain local power supply voltage (U(t)) is measured for a location on the chip. A set of time-domain measured voltage data (U(t)) is accumulated and transformed into the frequency domain to yield a local voltage profile (U(f)). The local voltage profile (U(f)) is compared with a reference voltage profile (U(f)) to verify whether power supply quality at the chip location under test is adequate. Alternatively, a local impedance profile Z(f) evaluated from the local voltage profile (U(f)) may be compared to a reference impedance profile Z(f).

Method and system for performing self-tests in an electronic system

A method and associated system for evaluating a high-frequency signal (S) at a point of interest on a signal path. The high-frequency signal (S) at the point of interest on the signal path is calculated by applying an inverse transfer function (iG) for the signal path to an argument of a remote signal (S) measured at a remote pickup point on the signal path, wherein the point of interest and the remote pickup point are two distant points on the signal path, wherein the high-frequency signal (S) and the remote signal (S) are represented as a respective time domain variable, and wherein said calculating is performed by a time domain evaluation process that operates in test equipment for electrical devices. The calculated high-frequency signal (S) is transferred to an output device of the test equipment.

Evaluating high frequency time domain in embedded device probing

A method for determining a power supply impedance profile (|Z(f)|) at a predetermined load location within an electronic system. A repetitive activity (such as a modulated clock tree signal) is applied in the load location, and the local power supply voltage (U(t)) caused by this repetitive activity is measured. Rather than measuring the corresponding current consumption (I(t)) caused by the repetitive activity, the current consumption is calculated analytically. The local power supply impedance profile (|Z(f)|) is calculated as the ratio of the frequency-domain voltage and current consumption magnitudes (|U(f)|, |I(f)|) of the measured power supply voltage (U(t)) and the calculated current consumption (I(t)).

Method and system for impedance measurement in an integrated Circuit

A system and associated method for evaluating a high-frequency signal at a point of interest on a signal path from a remote signal at a remote pickup point on the signal path. The point of interest is located on a device under test that is coupled to test equipment via the signal path. The high-frequency signal at the point of interest is calculated from the remote signal at the remote pickup point with an inverse transfer function that eliminates degradation effects on the high-frequency signal that is transferred through the signal path. The inverse transfer function may be calculated from measurements acquired in a test signal transfer through a reference path that simulates electrical properties of the signal path, or configured to a predetermined function if electrical properties of the signal path are known.

Method for determining the current return path integrity in an electric device connected or connectable to a further device

A circuit arrangement comprising a set of signal layers, a set of first power layers, a set of second power layers, a set of signal vias, a set of first power vias, a set of second power vias, wherein a signal via of the set of signal vias provides a signal path for a high-frequency (HF) signal current, wherein at least a power via of the set of first power vias and at least a power via of the set of second power vias provide return paths for return currents associated with the signal current, wherein the return path provided by the power via of the set of second power vias is connected with a power layer of the set of second power layers, wherein at least one power layer of the set of first power layers is arranged between the power layer of the set of second power layers and each signal layer of the set of signal layers.

Noise reducing circuit arrangement

System and method for evaluating high frequency time domain in embedded device probing

The present invention relates to computer hardware design, and in particular to a printed circuit board (card) comprising wiring dedicated to supply electric board components such as integrated circuits with at least three different reference planes. In particular at locations, where the pins of a card-to-card connector enter the layer structure of the card discontinuities brake the high frequency signal return path of a given signal wiring. In order to close the signal return path around a signal path from card to card including the connector, and thus to limit the signal coupling while concurrently keeping the card design as simple as possible, it is proposed to provide

Circuit on a printed circuit board

Growing community of inventors

Ostfildern, Germany

Roland Frech