Coherent Communications Systems Corp.

Digital Switch Corporation

Roland E Genter

Steven R Cook

A telecommunication signal processor includes a noise compensation system for preventing undesirable spectral modulation of the noise component of a telecommunication signal subjected to a process wherein subband portions of the signal are variably attenuated. A noise component is injected into each attenuated error signal in order to compensate for attenuation of background noise incidental to the variable attenuation of the subband signals. The amplitude of the noise components are each determined independently on the basis of an estimated noise content of the original subband signals and in accordance with the applied attenuation within each subband. The attenuated and noise-compensated subband signals are combined by a synthesis filter to provide a send-output signal.

Spectral noise compensation for telecommunication signal processing

An echo canceler for canceling echo components of a send-input signal, includes an analysis filter bank for dividing the send-input signal into a plurality of subband send-input signals. A receive-signal is also divided into a plurality of subband receive signals. Each of the subband receive signals is convolved with an impulse response function pertaining the echo path coupling the receive signal to the send-input signal within each subband. The convolutions yield a plurality of estimated echo signals, which are then each subtracted from the corresponding subband send-input signal, to produce a plurality of error signals. Residual echo components within the error signals are attenuated by a variable attenuator in response to a comparison of relative levels of corresponding subband send-input Signals, subband receive signals and the error signals. A noise component is injected into each attenuated error signal in order to compensate for attenuation of background noise incidental to the variable attenuation of the error signals. The amplitude of the noise components are each determined independently on the basis of an estimated noise content of the subband send-input signals and in accordance with the applied attenuation within each subband. The attenuated and noise-compensated error signals are combined by a synthesis filter to provide a send-output signal.

Echo canceler with subband attenuation and noise injection control

Residual echo from an echo canceler circuit is reduced by a variable attenuator that operates in response to a processing circuit which determines and adjusts an attenuation factor. The attenuation factor is determined by comparing relative levels of the send input signal, the receive input signal, and the error signal remaining after removal of an expected echo signal from the send input signal. The variable attenuator provides linear power attenuation of the error signal in order to reduce transmission of the residual echo signal and to eliminate the perception of coupling and decoupling of the telephone connection which occurs in known echo cancelers employing center clipping. A noise injection circuit provides a noise signal that is injected into the transmitted signal in inverse proportion to the attenuation of the error signal in order to provide a constant noise level in the transmitted signal as the error signal is variably attentuated.

Echo canceller processing techniques and processing

An echo canceller with an adaptive convolution processor for computing and subtracting an anticipated echo has a nonlinear processor coupled to the error signal and to the send output. The nonlinear processor is responsive to average values and attenuates the error signal over a continuous range as a function of presence of send and receive signals, rather than coupling and decoupling the error signal to the output in the manner of a center clipper. Attenuation is altered rapidly when one of the send and receive ends is active, which may be detected by their averages or by loss across a summing junction providing the error signal. Attenuation is decreased gradually neither of the send and receive ends are active. The error signal attenuation level is also used to control injection of artificial noise. An average floor noise level in the send signal is determined and a noise injection apparatus coupled to the send output variably injects an artificial noise signal in inverse proportion to attenuation of the error signal, up to a maximum of the floor noise level. The gradual adjustment of attenuation of the error signal (which includes the send-in signal), and maintenance of the output noise level at the average background level of the input make operation of the echo canceller unnoticeable to the far end listener.

Residual echo elimination with proportionate noise injection

A digital switching matrix for use in telephone systems which provides non-blocking operation and is capable of non-blocking expansion without reconfiguration of the existing system. A provision for providing message tones such as dial tone, business line, etc., without requiring a map search of the switching matrix, and an integral testing provision are also described.

Non-blocking expandable switching matrix for a telecommunication system

A frame synchronization system for time division multiplexed data wherein all the time slots of the frame are considered during the course of the frame as opposed to being considered individually. The framing system comprises a first memory, e.g., a random access memory (RAM), and a second memory, e.g., a programmable read-only memory (ROM). The RAM includes respective locations corresponding to each relative bit time slot in the framing interval. The ROM includes respective locations corresponding to each correlation state in a predetermined sequence of states, respectively indicative of the number sequential bits in a given time slot matching the synchronization pattern. Each word in the ROM contains, in a link field, indicia of the ROM locations corresponding to the next state in the sequence. The ROM word also contains indicia of whether or not a correlation state has been attained indicative of the frame sync bit. Each RAM location is sequentially addressed in synchronism with the data input stream. The RAM output is applied, together with the data train bit, to the address input of the ROM. The contents of the RAM location corresponding to the instantaneous bit time slot provides the base address, e.g., the most significant bits, and the data bit provides the least significant bit of the address of the ROM location to be accessed. The indicia in the addressed ROM locations corresponding to the next state in sequence is fed back as a data input to the RAM and loaded into the location corresponding to the instantaneous time slot. If the state associated with the addressed ROM location indicates sufficient correlation to the predetermined sync pattern, a pulse is generated on a frame sync line during the time slot to indicate the occurrence of the framing bit. Various correlation state sequences are also described.

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Falls Church, VA, United States of America

Roland E Genter