Fujitsu Corporation

Rokutaro Ogawa

Kenichi Ohno

Tohru Hosomizu

Mitsuhisa Shimizu

A semiconductor device comprising a semiconductor bulk in which a plurality of basic circuit elements are formed, first interconnecting lines being formed on a first insulation layer of said semiconductor bulk, a second insulation layer formed on both said first insulation layer and said first interconnecting lines, and a cell in which said basic circuit elements are connected with each other by said first interconnecting lines, wherein the first interconnecting line for connecting two of said basic elements in the cell has two separated parts, one end of each of said parts is connected to one of said basic elements, said second insulation layer is provided with a pair of through-holes in the cell, and each of said pair of through-holes contacts with the other end of each of said parts.

Multilevel masterslice LSI with second metal level programming

A large scale semiconductor integrated circuit device comprising plural transistors and resistors formed in one semiconductor substrate, and many emitter-coupled circuits formed by connecting the transistors and resistors with a double metallic layer on the substrate surface. Groups of these emitter coupled circuits are disposed in the form of arrays with circuits of several groups handling larger power than those of other groups, and resistance values in the emitter coupled circuits of the different groups are selected in accordance with the position and arrangement of each group to compensate for any potential variation between that group and the power supply and ground terminals between the groups and respective input/output terminals. Large scale transistors are provided for outputting the emitter-follower circuits. These groups contain the emitter coupled circuits, and are connected to the input/output terminals by the double metallic wiring layer.

Growing community of inventors

Yokohama, Japan

Rokutaro Ogawa