Freescale Semiconductor,inc.

Rohit Gupta

Amit Aggarwal

Andrey Evgenevich Malkov

Ashish Malhotra

Evgeny A Shevchenko

Gur Prasad Srivastava

Parampreet Singh Baweja

An integrated circuit (IC) includes a first I/O cell, a logic cell, a trigger signal generation circuit, and a second I/O cell having a voltage selection pin. I/O interfaces of the first I/O cell receive first and second supply voltages, respectively, and I/O interfaces of the second I/O cell receive third and fourth supply voltages, respectively. The first I/O cell generates a first trigger signal when the first supply voltage reaches a first predetermined voltage. The logic cell receives the first trigger signal and generates a safe-state signal. The trigger signal generation circuit generates a second trigger signal when the third supply voltage reaches a second predetermined voltage. The voltage selection pin receives the safe-state signal and the second trigger signal and sets the second I/O cell in a safe-state mode, which protects the second I/O cell from over voltage damage.

Integrated circuit with multi-voltage input/output (I/O) cells

A system for reducing dynamic power consumption of a wakeup source includes a receiver interface coupled to the wakeup source. A data packet, received by the receiver interface, transmits the data packet to the wakeup source. The wakeup source processes the data packet to identify a predetermined code for initiating a wakeup sequence. The wakeup source is put into a deep sleep mode if it is idle for a predetermined time period.

System for reducing dynamic power consumption of wakeup source

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Panchkula, India

Rohit Gupta