Arteris, Inc.

Rohit Bansal

Parimal Gaikwad

Alexis Boutiller

Jean Philippe Loison

Benoit De Lescure

Mohammed Khaleeluddin

Benoit deLescure

A distributed system implementation for cache coherence comprises distinct agent interface units, coherency controllers, and memory interface units. The agents send requests in the form of read and write transactions. The system also includes a memory that includes coherent memory regions. The memory is in communication with the agents. The system includes a coherent interconnect in communication with the memory and the agents. The system includes a second identical coherent interconnect in communication with the memory and the agents. The system also includes a comparator for comparing at least two inputs, the comparator is in communication with the two coherent interconnects.

System and method for logic functional redundancy

Functional interconnect redundancy in cache coherent systems

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Rohit Bansal