Maxim Integrated Products, Inc.

Roger W Fuller

David Bingham

The invention relates to an output circuit capable of producing an output signal which may be disabled, leaving the output terminal in a high impedance state capable of being driven externally to a voltage significantly outside the bounds of the output circuit power supply. The output circuit of the invention includes two terminals adapted to be connected to a power supply capable of providing a supply voltage. The output circuit includes an MOS transistor having a substrate, source and drain terminals and a gate, one of the source and drain terminals being coupled to one of the power supply terminals. A second transistor has three terminals including a control terminal and two other terminals, one of which is coupled to the other of the source and drain terminals of the MOS transistor, and the other of which is coupled to the other power supply terminal. An output terminal is coupled between the one terminal of the second transistor and the other of the source and drain terminals of the MOS transistor. A means responsive to an external signal is provided for rendering the output terminal in a high impedance state. A substrate control circuit coupled to the substrate, source and drain terminals of the MOS transistor has a means (1) for detecting whether the voltage at the output terminal is within the voltage range of the power supply, and (2) for controlling the voltage on the substrate of the MOS transistor such that neither its source-substrate nor its drain-substrate junctions can become forward biased, while at the same time providing a voltage capable of disabling both the bipolar and the MOS transistors upon receipt of the external signal. This circuit, unlike prior art circuits, allows the output terminal to be driven significantly beyond the limits of the voltages at the terminals of the power supply, thus permitting its use in 'wired-or' configurations which are important where line driver outputs are used, allowing operation with multiple power supplies having differing voltages, or with no power supply at all.

CMOS amplifier/driver stage with output disable feature

A monolithic integrated circuit containing an inverting/non-inverting voltage doubler charge pump circuit is disclosed for converting a unipolar supply voltage to a bipolar supply voltage of a greater magnitude. The unipolar input voltage is placed across a first external transfer capacitor by a first set of MOS switches during a first time period. The unipolar input voltage source is placed in series with the first transfer capacitor and this series combination of voltages is placed across a first external reservoir capacitor by a second set of MOS switches during a second time period. The voltage appearing across the first external reservoir capacitor is placed on a second transfer capacitor during the first time period by a third set of MOS switches. The voltage across the second transfer capacitor is placed into a second external reservoir capacitor with its polarity inverted by a fourth set of MOS switches during the second time period. A dual-collector lateral junction transistor, formed during the conventional CMOS processing steps used to fabricate the MOS switches, is connected as a voltage clamp between a ground potential and the two bipolar DC output lines of the power supply circuit to assure correct start-up conditions for the circuit. Gain reduction devices are placed in the semiconductor substrate to collect minority carriers which would otherwise be injected into inherent parasitic four layer PNPN junction devices created as a result of the architecture of the circuit, to prevent latch-up of the four layer devices. In a preferred embodiment, an RS-232 receiver and transmitter are contained on the same monolithic integrated circuit as the dual charge pump power supply.

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Scotts Valley, CA, United States of America

Roger W Fuller