Analog Devices,inc.

Rf Micro Devices, Inc.

Roger Van Brunt

Mark Alexander John Moffat

Stefan Jones

Steve Picken

Apparatus and methods for fractional-N synthesizer phase-locked loops with multi-phase oscillators are provided. In certain configurations, a fractional-N PLL includes a time-to-digital converter (TDC), a digital loop filter, a multi-phase oscillator, and fractional division circuitry. The multi-phase oscillator includes multiple taps used to generate multiple clock signal phases that are provided to the fractional division circuitry to reduce the fractional-N PLL's quantization error. The fractional division circuitry includes a tap error correction circuit for compensating for errors in tap positions of the multi-phase oscillator. By including the tap error correction circuit, the phase noise and/or jitter performance of the fractional-N PLL can be enhanced.

Apparatus and methods for fractional-N phase-locked loops with multi-phase oscillators

Apparatus and methods for phase-locked loops (PLLs) are provided. In certain implementations, a PLL includes a voltage controlled oscillator (VCO) including first and second frequency control circuits, which are coupled to first and second frequency control inputs, respectively. Additionally, the PLL can further include a loop filter, a high frequency pole circuit, and a low frequency pole circuit. The high frequency pole circuit can be electrically connected between the loop filter's output and the VCO's first frequency control input, and the low frequency pole circuit can be electrically connected between the loop filter's output and the VCO's second frequency control input.

Apparatus and methods for phase-locked loops

The present invention is a quadrature VLIF receiver, including calibration circuitry, and methods to closely match signal processing of an in-phase signal path and a quadrature-phase signal path to optimize VLIF image rejection. The calibration circuitry includes a variable gain variable-phase calibration signal generator, a variable gain amplifier for each signal path, phase adjustment circuitry for each signal path, and switching circuitry to support calibration steps. The calibration signal generator supplies a calibration signal at the same frequency as mixer local oscillator signals; therefore, during calibration, all signals downstream of the VLIF mixer are at DC, which simplifies calibration measurements, thereby minimizing calibration times.

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Santa Cruz, CA, United States of America

Roger Van Brunt