Intel Corporation

Roger V Brunt

Andrew M Volk

Terry L Baucom

A dual loop phase locked loop system having a secondary loop for controlling various circuit, environmental and process variations. The secondary loop is comprised of a phase comparator, a filter, a transconductance amplifier and a one-shot, wherein the output of the one-shot is fed back as an input signal for comparison with a reference signal at the input of the phase comparator. The filter generates a correction voltage which is dependent on the phase difference determined by the phase comparator, and the transconductance amplifier generates a charging current corresponding to the error voltage from the filter, wherein the charging current controls the charging of the input capacitor to the one-shot circuit for determining the duration of the pulse width of the output of the one-shot. The one-shot based loop is inherently stable since there is only one pole near the origin of the S-Plane. The primary loop is comprised of a phase comparator, a filter, a transconductance amplifier and an output means, which is a VCO and a voltage divider. The primary loop provides the actual phased locked loop of an input reference signal, however, it derives compensating analog trim information from the secondary loop. The dynamic characteristics of the primary loop are established by the reference loop, based on the reference clock frequency. Further, the loop response is controlled by the reference frequency, and is immune to process, temperature and voltage variations. In addition the loop frequency characteristics can be programmed by adjusting the reference clock.

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Roger V Brunt