International Business Machines Corporation

Lenovo (singapore) Pte. Ltd.

Roger Scott Krabbenhoft

David Clifford Long

John Richard Dangler

Kevin Albert Splittstoesser

Brian L Carlson

William Louis Brodsky

Stefano Sergio Oggioni

Silvio Dragone

Michael T Peets

William Santiago-Fernandez

Bruce John Chamberlin

Michael J Fisher

Mitchell G Ferrill

Matthew Stephen Doyle

Russell Alan Budd

Mark Kenneth Hoffmeyer

James A Busby

Sarah K Czaplewski-Campbell

Matteo Cocchini

John Lee Colbert

David J Braun

Gerard Vincent Kopcsay

Jason R Eagle

Alina Deutsch

Arthur J Higby

George A Katopis

Dale E Goodman

Kyle Indukummar Giesen

Jeffrey A Taylor

Terry Fredrick Banitt

Christopher W Surovic

Erica Elizabeth Jasper Gant

Erica Elizabeth Jasper

An electronic component includes a first trace configured to transmit a first signal and a second trace configured to transmit a second signal. The electronic component further includes a layer of conductive material separated from the first and second traces by a layer of insulative material. The electronic component further includes a first vertical wall formed in direct contact with the layer of conductive material. The electronic component further includes a second vertical wall formed in direct contact with the layer of conductive material. The second vertical wall is separated from the first vertical wall by a void, and the void extends between the first trace and the second trace.

Electronic component comprising first and second conductive traces and a void formed in an insulative layer between the first and second traces providing crosstalk reduction

An electronic printed circuit board structure for mitigating conductive anodic filament growth. The structure includes at least two conductive layers and a dielectric layer sandwiched between the conductive layers. At least one hole extends through the dielectric layer, and a layer of nonconductive material covers the at least one hole, wherein the nonconductive material is glass-free. A conductive plate layer is disposed over the nonconductive material layer to form a via connection in the structure.

Method to manufacture conductive anodic filament-resistant microvias

A circuit apparatus includes a first circuit feature upon a first insulator and a second circuit feature upon the first insulator. The first circuit feature includes a planarized surface and the second circuit feature includes an irregular surface. The first circuit feature and the second circuit feature may be formed from patterning a conductive sheet that is upon the first insulator. The conductive sheet includes an irregular surface and a planarized surface. Conductive sheet roughness is minimized in first regions thereof and is maintained in second regions thereof. Selectively planarizing portions of the conductive sheet allows for the utilization of lower cost rougher conductive sheets. The planarized surface allows for increased signal integrity and reduced insertion loss and the irregular surface allows for increased adhesion and enhancing reliability of the circuit apparatus.

Insertion loss reduction and increased bonding in a circuit apparatus

A circuit apparatus includes at least one circuit feature formed from patterning a conductive sheet. The conductive sheet includes an irregular surface and a planarized surface. Conductive sheet roughness is minimized in first regions of the circuit apparatus and is maintained in second regions of the circuit apparatus. Selectively planarizing portions of the conductive sheet allows for the utilization of lower cost rougher conductive sheets. The planarized surface allows for increased signal integrity and reduced insertion loss and the irregular surface allows for increased adhesion and enhancing reliability of the circuit apparatus.

Methods of fabricating electronic circuits and electronic packages are provided. The electronic circuit includes a multilayer circuit board, and a tamper-respondent sensor embedded within the circuit board. The tamper-respondent sensor defines, at least in part, a secure volume associated with the multilayer circuit board. In certain implementations, the tamper-respondent sensor includes multiple tamper-respondent layers embedded within the circuit board including, for instance, one or more tamper-respondent frames and one or more tamper-respondent mat layers, with the tamper-respondent frame(s) being disposed, at least in part, above the tamper-respondent mat layer(s), which together define the secure volume where extending into the multilayer circuit board. In certain embodiments, one or more of the tamper-respondent layers are divided into multiple, separate tamper-respondent circuit zones, with the tamper-respondent layers, including the circuit zones, being electrically connected to monitor circuitry within the secure volume.

Circuit boards and electronic packages with embedded tamper-respondent sensor

Electronic circuits, electronic packages, and methods of fabrication are provided. The electronic circuit includes a multilayer circuit board, and a tamper-respondent sensor embedded within the circuit board. The tamper-respondent sensor defines, at least in part, a secure volume associated with the multilayer circuit board. In certain implementations, the tamper-respondent sensor includes multiple tamper-respondent layers embedded within the circuit board including, for instance, one or more tamper-respondent frames and one or more tamper-respondent mat layers, with the tamper-respondent frame(s) being disposed, at least in part, above the tamper-respondent mat layer(s), which together define the secure volume where extending into the multilayer circuit board. In certain embodiments, one or more of the tamper-respondent layers are divided into multiple, separate tamper-respondent circuit zones, with the tamper-respondent layers, including the circuit zones, being electrically connected to monitor circuitry within the secure volume.

The embodiments relate to a method for integrating a venting system in a circuit board. Three or more interconnected accesses (VIAs) are formed in a printed circuit board (PCB). The VIAs are interconnected by routing a bi-planar channel spanning through the VIAs. The channel includes at least two sections, including a first channel section at a first plane extending from the first VIA to the second VIA and a second channel section at a second plane extending from the second VIA to the third VIA. The first and second sections are at different planar levels.

Embedding an integrated venting system into a printed circuit board

A circuit apparatuses include at least one circuit feature formed from patterning a conductive sheet. The conductive sheet includes an irregular surface and a planarized surface. Conductive sheet roughness is minimized in first regions of the circuit apparatus and is maintained in second regions of the circuit apparatus. Selectively planarizing portions of the conductive sheet allows for the utilization of lower cost rougher conductive sheets. The planarized surface allows for increased signal integrity and reduced insertion loss and the irregular surface allows for increased adhesion and enhancing reliability of the circuit apparatus.

Embedded venting system

An apparatus includes a spray module with at least one column of spray nozzles. Each spray nozzle is configured to deliver a processing substance on a semiconductor substrate during a process for semiconductor manufacturing as the semiconductor substrate moves past the spray module. The at least one column of spray nozzles is arranged with respect to a direction of travel of the semiconductor substrate so the semiconductor substrate passes the spray nozzles. A location module identifies a location of the semiconductor substrate with respect to the spray module. A spray pattern module determines a spray pattern of where a processing substance is to be delivered to the semiconductor substrate and a nozzle control module actuates each spray nozzle independently based on the spray pattern and a location of the semiconductor identified by the location module.

Digital processing equipment

Process of fabricating printed circuit board

The embodiments relate to integrating a venting system in a circuit board. Three or more interconnected accesses (VIAs) are formed in a printed circuit board (PCB). The VIAs are interconnected by routing a bi-planar channel spanning through the VIAs. The channel includes at least two sections, including a first channel section at a first plane extending from the first VIA to the second VIA and a second channel section at a second plane extending from the second VIA to the third VIA. The first and second sections are at different planar levels.

A printed circuit board is fabricated so contacts for tight-pitch components are at an angle with respect to the bundles of glass fibers in the epoxy-glass printed circuit board such that adjacent component contacts do not contact the same bundle of glass fibers. This angle may be accomplished by manufacturing a printed circuit board panel with the glass fibers at an angle with respect to its edges. This angle may also be accomplished by placing parts on a printed circuit board panel that has a traditional X-Y orthogonal weave of glass fiber bundles at an angle with respect to the edges of the panel. This angle may also be accomplished by starting with a traditional panel that has an X-Y orthogonal weave, laying out parts on the panel along the X-Y weave, then placing components on the parts at an angle with respect to the edges of the parts.

Enhanced-reliability printed circuit board for tight-pitch components

Growing community of inventors

Rochester, MN, United States of America

Roger Scott Krabbenhoft