Advanced Micro Devices Corporation

Roger L Alvis

Bryan M Tracy

Scott D Luning

Andrew Norman Erickson

Jeremias D Romero

Janice Gray

Paul Raymond Besser

John A Iacoponi

Emi Ishida

Homi Fatemi

David J Dingley

Ayesha R Kizchery

Peter Griffin

A method of reducing implant dose loss is provided. The method includes performing multiple low dose implant steps with interspersed anneal steps, thereby avoiding amorphous-silicon formation. The anneal steps may be performed at high temperatures or at low temperatures.

Semiconductor fabrication with multiple low dose implant

Precise sensing and controlling of temperature during in-situ testing of a structure used in an integrated circuit by fabricating or placing a heat source element adjacent to the structure and by fabricating or placing a temperature sensing element adjacent to the structure.

Method for precise temperature sensing and control of semiconductor structures

A process for forming a shallow, lightly doped region in a semiconductor device. The method comprises the steps of providing a semiconductor substrate having a surface; growing an oxide layer on the substrate, the oxide having a thickness; depositing a layer of polysilicon on the oxide; patterning the polysilicon layer and the oxide layer to provide a gate structure; and implanting into the substrate a source and a drain region about the gate structure at an angle less than 90 degrees with respect to the surface of the substrate.

Shallow drain extension formation by angled implantation

The present semiconductor device and method of fabrication thereof includes the provision of a trench or via hole in a dielectric, with a barrier layer thereon extending into the trench or via hole. A layer of titanium is provided over the barrier layer, also extending into the trench or via hole, and aluminum or aluminum alloy is provided over the titanium layer. The barrier layer provides good conformal coverage while also preventing outgassing of the dielectric from adversely affecting the conductor. The barrier layer also serves as a wetting agent for the deposition and flowing of aluminum or aluminum alloy. The titanium layer can be extremely thin, or non-existent, so as to avoid significant growth of TiAl.sub.3 and the problems attendant thereto.

Deposition of a conductor in a via hole or trench

Electron beam emitting filaments having a tip with a radius of curvature less than about 50 .ANG. are produced using focused ion beam milling. In one embodiment, platinum is deposited on a tungsten loop electron beam filament and sharpened using focused ion beam milling to a radius of curvature less than about 50 .ANG..

Electron beam emitting tungsten filament

Method of forming electron beam emitting tungsten filament

A diode is formed at the tip of a pointed portion of a probe of a scanning probe microscope. When the diode is forward biased, the current through the diode varies with the temperature of the diode. The magnitude of the current is an indication of the temperature of the tip of the probe. If the tip is scanned over a surface, a thermal map of the surface can be made and hot spots on the surface located. In some embodiments, the pointed portion of the probe is made of a semiconductor material (for example, silicon). A layer of a metal (for example, platinum) is made to contact the semiconductor material of the pointed portion only at the tip of the pointed portion, thereby forming a very small temperature sensing Schottky diode at the tip of the pointed portion.

Temperature sensing probe for microthermometry

An accurate method of measuring the two-dimensional doping profile of a semiconductor by measuring an electrical parameter along a path of a dopant iso-concentration. Thin vertical or horizontal slices of the semiconductor integrated circuit are provided and are probed to allow the electrical parameter to be measured through a single concentration area.

Scanning spreading resistance probe

A method of accurately determining the composition of a dielectric film in a semiconductor device by performing a compositional analysis on a film only portion of the semiconductor device.

Method of accurate compositional analysis of dielectric films on

A process for forming shallow and/or lightly doped regions of impurity concentration adjacent to source/drain semiconductor regions in a semiconductor device. In one embodiment, the invention comprises: (a) providing a semiconductor of a first conductivity type having a first surface; (b) forming a gate structure on said first surface, the gate structure including a gate oxide layer and a polysilicon layer, and a ledge; and (c) implanting an impurity of a second conductivity type into the material and the ledge whereby a portion of the implant enters the substrate after passing through the ledge area overlying the edge of the gate and enters the substrate to a first depth below the surface, while a second portion of the implant does not pass through the ledge and enters the substrate to a depth below the surface of the substrate deeper than the first portion. In addition, an apparatus is disclosed, The apparatus may include a substrate having a surface; an insulating layer on the surface of the substrate, having a surface; a gate material layer on the surface of the insulating layer, the gate material layer having a surface; and an overhanging ledge comprised of an etchable material, having a thickness sufficient to permit at least a portion of a dopant implant to penetrate said overhanging ledge provided on the surface of the gate material layer.

Self-aligned implant energy modulation for shallow source drain

A sample to be analyzed by a scanning electron microscope is held at an electrostatic potential higher than the recording plate of the microscope. This provides that electrons scattered from the sample which are at an energy level lower than a chosen level are drawn back into the sample by the potential of the sample, while other, higher energy scattered electrons reach the recording plate to form a pattern thereon.

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Cupertino, CA, United States of America

Roger L Alvis