Cray Research, Inc.

Other

Roger G Brown

David A Bittle

James W Sundet

Eric Fischer

Charles A Richter

Richard A Shannon

Allen Kramer

A method and system exchanges assets defined as digital automated equities which are objects instantiated with attributes of an asset. Digital automated equities are registered on a common system exchange as offeror mediary objects and matched by comparing their attributes. Capital exchange offer objects define desired matches by identifying a digital automated equity associated with an exchange offer, a exchange price for the exchange and one or more conditions associated with the exchange. A match use case compares attributes of capital exchange offers to determine matches based on the closeness of the capital exchange offers and a negotiate transaction use case supports communication between owners associated with close capital exchange offers to alter attributes in response to a match. Once a transaction is complete, a settle transaction use case exchanges the digital automated equities. Digital automated equities may include a variety of assets, including intellectual property such as patents and trademarks, business plans, stock and confidential information. Further, the present invention provides a secure format for exchange of confidential information in stages.

Method and system for a digital automated exchange

An input cell to the core logic on an electrical component and an output cell from the core logic on an electrical component are provided with a first signal path for data, a second signal path for scan data, a flip flop positioned near the pad of the core logic for selecting between said first signal path for data and second signal path for scan data. The scan data is used to input special signals or vectors to the core logic and to read the results of the scan data after it has passed through the core data and has been manipulated thereby. Several of the electrical components can be electrically connected to one another. The output cell of a first chip is electrically attached to the input cell of a second electrical component. The individual electrical components are connected on a printed circuit board and typically there are electrical conductors associated with the printed circuit board that are used to electrically connect the first chip or electrical component and the second chip or electrical component.

Fabrication of test logic for level sensitive scan on a circuit

A fault tolerant network for a plurality of computers includes a system for controlling access to shared peripherals. Access to the shared peripherals is coordinated among the computers by means of communication through a semaphore box. Each computer connects to the semaphore box via a channel. The semaphore box is comprised of two major sections: a semaphore section and an I/O section. The semaphore section contains two sets of semaphores: a first set comprising reservation semaphores for the shared peripherals; and a second set comprising heartbeat semaphores for the sharing computers. The first set is used to reserve a particular peripheral for a particular computer and indicate the source of the reservation; the second set provides a 'heartbeat' to prevent reservation semaphores from being set indefinitely in the event communication with a particular computer is lost.

Fault tolerant networking architecture

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Colfax, WI, United States of America

Roger G Brown