Xilinx, Inc.

Roger D Carpenter

David Bruce Parlour

Scott O Frake

Kerry M Pierce

Vincent L Tong

F Erich Goettling

According to the invention, a regulated voltage pump is provided which uses a chain of diodes between each of which is attached one plate of a capacitor for which the other plate is driven by a clock signal. The regulated voltage pump of the present invention uses feedback from the output signal to determine how many capacitors to pump. A comparator compares a signal related to the pumped output signal to a reference voltage (which may be the power supply voltage) and controls how many intermediate pumping capacitors receive a switching clock signal. Thus a regulated pumped voltage is provided.

Regulator for pumped voltage generator

According to the present invention, means are provided for joining metal wire segments into one or more serpentine structures during the testing phase so that a signal applied at one end will be detected at the other end if the metal segments are continuous. Metal segments connected into one serpentine chain can be simultaneously tested for continuity from a single origin and destination. Preferably two serpentine chains are provided, physically interdigitated with each other so that electrical shorts between adjacent wire segments will cause a signal applied to one serpentine chain to be detected on the other serpentine chain.

Structure and method for testing wiring segments in an integrated

The present invention reduces bounce in the power or ground supply voltages of an integrated circuit chip by gradually turning output drivers both on and off, so there is not a sharp discontinuity in current flow to an external device. Greatest current flow occurs at the middle of a transition period. The gradual turn-off at the end of a transition is achieved by feeding back voltage of the output signal to a device which controls the output driver. As output voltage approaches its final value, the output driver gradually turns off, preventing a sharp transient in the power or ground voltage of the integrated circuit chip.

Load programmable output buffer

A capacitor is formed in three adjacent conductive layers of a semiconductor integrated circuit chip. A first plate of the capacitor is formed in the middle layer. A second plate is formed in the upper and lower layers plus a small portion of the middle layer which interconnects the upper and lower layers and forms a U-shaped structure surrounding the first plate. These capacitors are preferably formed in pairs with the first plates interconnected. The second plates may be connected to different voltage supplies to form a capacitive voltage divider.

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Cupertino, CA, United States of America

Roger D Carpenter