Intermec, Inc.

Interface Mechanisms, Inc.

John Fluke Manufacturing Company, Inc.

Roger C Palmer

William J Purdue

After discussion of a typical prior art thermal printer that is capable of providing precise printing of machine-readable characters on a thermal print medium through the use of an electrically-resistive thermal print element, a thermal model of the thermal print element and the heat transfer relationships between the thermal print element and its surrounding environment is constructed. From this thermal model, an equivalent electrical model is constructed which provides a signal representing the estimated temperature of the thermal print element. This signal is then used to control the exposure time of the thermal print (the time that is sufficient to raise the temperature of only an incremental area of the thermal print medium in uniform contact with the thermal print element to or above the threshold temperature) and to control the rest time of the thermal printer (the time following the exposure time that is sufficient to allow the temperature of the thermal print element to decrease to a value that will not result in additional exposure of the thermal print medium upon movement thereof).

Method and apparatus for controlling the area of a thermal print medium

An electrical output signal from an electro-optical code reader is amplified (U1) to develop a first signal which is applied to a positive peak detector (U2D1, C2) and a negative peak detector (U3, D2, C3). The positive peak detector provides a second signal whose voltage level follows that of the first signal as the first signal increases, from the time that the voltage level of the second signal is brought substantially equal to that of the first signal to the time that the first signal begins to decrease, with the voltage level of the second signal thereafter being maintained substantially constant. The negative peak detector provides a third signal whose voltage level follows that of the first signal as the first signal decreases from the time that the voltage level of the third signal is brought substantially equal to that of the first signal to the time that the first signal begins to increase, with the third signal thereafter being maintained substantially constant. The second and third signals are combined (R5,R6) top provide a reference signal whose voltage level is intermediate those of the second and third signals. A comparator (U4) provides a circuit output signal which has a first logic level when the voltage level of the first signal exceeds that of the reference signal and which has a second logic level when the voltage level of the reference signal exceeds that of the first signal. The logic level transitions in the circuit output signal are detected (C4, R10, D6, R11; U5, C5, R9, D7, R 8) to develop pulses which momentarily close fast-acting semiconductor switches (S1, S2) associated with the positive and negative peak detectors, whereby the voltage level of the second signal is brought to that of the first signal at the time that the voltage level of the first signal goes above that of the reference signal, and whereby the voltage level of the third signal is brought to that of the first signal at the time that the voltage level of the first signal goes below that of the reference signal.

Wave shaping circuit for electro-optical code readers

A microwave input signal whose frequency is to be determined is mixed in a mixer with a local oscillator (LO) signal and the resultant difference signal is applied to a low pass filter. The frequency of the LO signal is controlled by a digital processor that samples the output of the low pass filter. Initially the LO signal is at zero. Thereafter, the frequency of the LO signal is sequentially stepped through the fundamental and, then, the harmonics of a principal oscillator signal having a fundamental frequency F.sub.R. When the difference frequency falls within the direct counting capability of a digital counter, the digital processor opens a main gate for a short period of time, and a first difference frequency (F.sub.1) count is made and stored. The frequency of the LO signal is then offset by a known amount, and a second difference frequency (F.sub.2) count is made and stored -- if this F.sub.2 count is within the direct counting capability of the digital counter. Alternatively, if this F.sub.2 count lies beyond the direct counting capability of the digital counter, the frequency of the LO signal is stepped to the next F.sub.R offset harmonic and, then, an alternate F.sub.2 count is made and stored. The relationship between F.sub.1 and F.sub.2 determines whether or not the LO signal frequency, when the counts were made, was above or below the frequency of the input signal. Subsequent to the F.sub.1 and F.sub.2 counts being made and stored, the main gate is again opened, this time for a precise period of time related to the requisite resolution required and the digital counter makes and stores a third difference frequency (F.sub.3) count. F.sub.3 is algebraically summed with the LO signal frequency produced when F.sub.3 was determined, to obtain a displayable count equal to the frequency of the input signal. A jitter generator is provided to randomly frequency modulate the LO signal to preclude phase lock between the LO signal and the input signal, when the F.sub.1 and F.sub.2 counts are being made and stored during a counting sequence.

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Edmonds, WA, United States of America

Roger C Palmer