Nxp B.v.

Ams International Ag

Taiwan Semiconductor Manufacturing Comp. Ltd.

Sciosense B.v.

Interuniversitair Microelektronica Centrum (Imec)

Ams Ag

Quotainne Enterprises LLC

Koninklikje Phillips Electronics

Imec

Roel Daamen

Aurelie Humbert

Youri Victorovitch Ponomarev

Matthias Merz

Greja Johanna Adriana Maria Verheijden

Pascal Bancken

Viet Nguyen Hoang

Gerhard Koops

Coenraad Cornelis Tak

Hendrik Bouman

Dimitri Soccol

David Tio Castro

Nebojsa Nenadovic

Peter G Steeneken

Erwin Hijzen

Jan Sonsky

Anco Heringa

Evelyne Gridelet

David Van Steenwinckel

Robertus Adrianus Maria Wolters

Viet Nguyen

Kailash Vijayakumar

Viet Hoang Nguyen

Liang Yan

Gerard Koops

Rene Theodora Hubertus Rongen

Marcus Johannes Henricus Van Dal

Franciscus Petrus Widdershoven

Remco Henricus Wilhelmus Pijnenburg

Axel Nackaerts

Gilberto Curatola

Frederik Willem Maurits Vanhelmont

Romano Hoofman

Hilco Suy

Karen Attenborough

Erik Jan Lous

Robertus A M Wolters

Michael A A In 't Zandt

Agata Sakic

Casper Juffermans

Annelies Falepin

Romano Julma Oscar Maria Hoofman

Julien M M Michelon

Micha In't Zandt

Robertus Antonius Maria Wolters

Martinus P M Maas

Frisco J M Jedema

Twan Van Lippen

Josephus Franciscus Antonius Maria Guelen

Fotopoulou Kyriaki

Anton Tombeur

Friso J Jedema

Michael A A In 'T Zandt

Robertus Wolters

Kyriaki Fotopoulou

In an embodiment a method includes determining, for each capacitor element of a plurality of capacitor elements of a capacitor, an increase of a capacitance of a capacitor element caused by a decrease of a temperature of the capacitor and deriving a dew point from a temperature at which the increases of the capacitances or values corresponding to the increases of the capacitances exceed a predefined limit by generating a set of binary digits, each of the binary digits corresponding to one of the capacitor elements and indicating whether the capacitance of the capacitor element is within a predefined range, comparing sets of binary digits generated at different temperatures and determining a number of capacitor elements for which the corresponding binary digits of the sets are different and repeating the comparison for a sequence of sets generated at decreasing temperatures.

CMOS compatible dew point sensor device and method of determining a dew point

In an embodiment, a pressure sensor module includes a base electrode surrounding at least a part of a bottom electrode, an anchor arrangement on top of the base electrode including at least two electrically conductive walls that both surround at least the part of the bottom electrode and an electrically conductive layer that covers at least the bottom electrode and the anchor arrangement such that a cavity is formed between the bottom electrode, the anchor arrangement and the electrically conductive layer, wherein, on at least one side of the cavity, a proportionate area of the electrically conductive walls in a cross section extending from a surface of an inner wall of the anchor arrangement facing the cavity to a surface of an outermost wall of the anchor arrangement facing away from the cavity in a plane parallel to a plane of the bottom electrode is equal to or less than 10%.

Pressure sensor module

In an embodiment a dew point sensor device includes a semiconductor substrate, a top layer arranged on the semiconductor substrate, a Peltier element integrated in the semiconductor substrate, a temperature sensor, a capacitor arranged at a surface of the top layer facing away from the semiconductor substrate, the temperature sensor and the capacitor being arranged so that a temperature of the capacitor is measurable by the temperature sensor, wherein the capacitor includes a plurality of capacitor elements each having a capacitance, and an electronic circuit configured for an individual determination of the capacitances and a generation of a set of binary digits, each of the binary digits corresponding to one of the capacitor elements and indicating whether the capacitance of the capacitor element is within a predefined range.

CMOS-compatible dew point sensor device and method of determining a dew point

The sensor semiconductor device comprises a substrate () with a main surface (), a sensor region () on or above the main surface, a coating layer () above the main surface, and a trench () formed in the coating layer around the sensor region. The trench provides drainage of a liquid from the coating layer.

Sensor semiconductor device and method of producing a sensor semiconductor device

Disclosed is an integrated circuit comprising a substrate () carrying a plurality of circuit elements; a metallization stack () interconnecting said circuit elements, said metallization stack comprising a patterned upper metallization layer comprising a first metal portion () and a second metal portion (); a passivation stack () covering the metallization stack; a gas sensor including a sensing material portion () on the passivation stack; a first conductive portion () extending through the passivation stack connecting a first region of the sensing material portion to the first metal portion; and a second conductive portion () extending through the passivation stack connecting a second region of the sensing material portion to the second metal portion. A method of manufacturing such an IC is also disclosed.

Integrated circuit with sensor and method of manufacturing such an integrated circuit

A sensor package comprises a sensor chip bonded to an intermediate carrier, with the sensor element over an opening in the carrier. The package is for soldering to a board, during which the intermediate carrier protects the sensor part of the sensor chip.

Package for environmental parameter sensors and method for manufacturing a package for environmental parameter sensors

A method includes providing a substrate having a first sacrificial oxide region, the substrate comprising a first interconnect layer, the first interconnect layer comprising the first sacrificial oxide region. The method further includes covering the first sacrificial oxide region with a first porous layer being permeable to a vapor hydrofluoric acid (HF) etchant and selectively etching the first sacrificial oxide region through the first porous layer using the vapor HF etchant.

Method of manufacturing a device with a cavity

Disclosed is an integrated circuit comprising a substrate carrying a plurality of circuit elements; a metallization stack interconnecting said circuit elements, said metallization stack comprising a patterned upper metallization layer comprising a first metal portion; a passivation stack covering the metallization stack; and a sensor including a sensing material on the passivation stack, said sensor being coupled to the first metal portion by a via extending through the passivation stack. A method of manufacturing such an IC is also disclosed.

A lateral test flow arrangement for a test molecule is disclosed, comprising: a test strip for transporting an analyte away from a sampling region and towards an absorbing region, the test strip having therein and remote from the sampling region, a test region for functionalization with a molecule which binds to the test molecule or to a conjugate of the test molecule; a sensing test capacitor having electrodes extending across the test strip at least partially aligned with the test region and being physically isolated therefrom; a reference test capacitor having electrodes extending across the test strip and being physically isolated therefrom; and an electronic circuit configured to measure a time-dependant capacitance difference between the sensing test capacitor and the reference test capacitor. A method for carrying out that lateral flow tests is also disclosed, as are test systems and in particular pregnancy test systems.

Electronic lateral flow test arrangement and method

One example discloses a breach sensor, comprising: a substrate including an integrated circuit; a passivation layer coupled to the substrate; a breach sensing element coupled to the circuit; wherein the breach sensing element is on a first side of the passivation layer and the substrate is on a second side of the passivation layer; a barrier configured to separate the breach sensing element from an ambient environment; wherein the breach sensing element is responsive to barrier damage.

Breach sensor

A container for containing a perishable substance has a container wall with an inner side and an outer side. The wall has an electrically conductive layer extending between the inner side and the outer side. The inner side faces the space containing the substance. The container comprises electronic circuitry having a sensor for sensing a physical property or condition of the substance, and an antenna for communicating an RF signal to a receiver, external to the container. The RF signal is indicative of the physical property or condition sensed. The sensor is positioned so as to be exposed to the space containing the substance in operational use of the container. The antenna is positioned at the outer side, or between the outer side and the electrically conductive layer, and is electrically isolated from the electrically conductive layer.

Food package with integrated RFID-tag and sensor

One example discloses an chip, comprising: a substrate; a first side of a passivation layer coupled to the substrate; a device, having a device height and a cavity, wherein a first device surface is coupled to a second side of the passivation layer which is opposite to the first side of the passivation layer; and a set of structures coupled to the second side of the passivation layer and configured to have a structure height greater than or equal to the device height.

Chip structure

An integrated circuit and a method of making the same. The integrated circuit includes a semiconductor substrate having a major surface. The integrated circuit also includes a thermal conductivity based gas sensor having an electrically resistive sensor element located on the major surface for exposure to a gas to be sensed. The integrated circuit further includes a barrier located on the major surface for inhibiting a flow of the gas across the sensor element.

Integrated circuit comprising a gas sensor

A micro-device includes a substrate with a cavity. The cavity is covered with a porous layer that is permeable to vapor hydrofluoric acid (HF) etchant. The micro-device comprises a Microelectromechanical Systems (MEMS) device with a component that is moveable in operational use of the MEMS device. The component is arranged within the cavity.

Micro-device with a cavity

Disclosed is an integrated circuit comprising a substrate (); and an optical COsensor comprising: first and second light sensors (') on said substrate, said second light sensor being spatially separated from the first light sensor; and a layer portion () including an organic compound comprising at least one amine or amidine functional group over the first light sensor; wherein said integrated circuit further comprises a signal processor () coupled to the first and second light sensor for determining a difference in the respective outputs of the first and second light sensor. An electronic device comprising such a sensor and a method of manufacturing such an IC are also disclosed.

Integrated circuit and manufacturing method

Growing community of inventors

Herkenbosch, Netherlands

Roel Daamen