Sony Corporation

Sony United Kingdom Limited

Sony Europe Limited

Rodney Hugh Densham

Peter Charles Eastty

Conrad Charles Cooke

William Edmund Kentish

William Edmund Cranstoun Kentish

Christopher Michael McCulloch

Nicholas John Haynes

An original digital audio signal represents unimpaired audio information. The digital audio signal is compressed and encrypted without substantial impairment to produce a first audio signal. A second, unencrypted, audio signal is produced. The first and second audio signals are combined. Preferably the first audio signal is losslessy compressed. The second audio signal may be an impaired version of the original digital audio signal.

Processing digital data

A method and apparatus is provided for generating an interrupt signal in a data processing system, the interrupt signal being supplied to a control processor of the system to indicate the occurrence of any of a plurality of predetermined events in the system. The method and apparatus operate by: writing data to at least one memory location of a plurality of pairs of memory locations A,B of the system in dependence upon the event to be indicated, the pairs of memory locations A,B being predefined in the system for respective ones of the events; reading data from the pairs of memory locations A,B; processing the data read from each pair of memory locations A,B to generate interrupt data indicative of whether the associated event has occurred, and if so transmitting an interrupt signal to the control processor; and writing the interrupt data corresponding to the events to respective third memory locations C, the third memory locations C being predefined in the control processor for the events. On receipt of an interrupt signal, the control processor reads the interrupt data in the third memory locations C to determine the event indicated by the interrupt signal.

Data processing system having capability to interpolate processing

A method and apparatus is provided for generating an interrupt signal in a data processing system, the interrupt signal being supplied to a control processor of the system to indicate the occurrence of any of a plurality of predetermined events in the system. The method and apparatus operate by: writing data to at least one memory location of a plurality of pairs of memory locations A,B of the system in dependence upon the event to be indicated, the pairs of memory locations A,B being predefined in the system for respective ones of the events; reading data from the pairs of memory locations A,B; processing the data read from each pair of memory locations A,B to generate interrupt data indicative of whether the associated event has occurred, and if so transmitting an interrupt signal to the control processor; and writing the interrupt data corresponding to the events to respective third memory locations C, the third memory locations C being predefined in the control processor for the said events. On receipt of an interrupt signal, the control processor reads the interrupt data in the third memory locations C to determine the event indicated by the interrupt signal.

Data processing system

In one aspect, the invention provides parallel processing apparatus comprising an array of data processors 4. arranged to operate synchronously, and a plurality of data buses. Each data processor 4 has first and second I/O means 16H, 16V for transfer of data between the processor 4 and respective data buses H,V a plurality of processors 4 being connected to each of the data buses H,V and each processor 4 being connected, via said I/O means 16H, 16V, to a different pair of data buses H,V. Each processor 4 includes selectively operable routing means 32H, 32V for interconnecting the first and second I/O means 16H, 16V to transfer data between the buses H,V connected thereto.

Array processing system with each processor including router and which

Data storage apparatus comprises: a memory having a plurality of addressable memory locations for storage of data items and memory address input means for receiving addresses of locations to be accessed; main input means for receiving an input address corresponding to a memory location; a counter for changing a count in response to a clock signal; address adjustment means for combining the count with an input address to generate an adjusted address corresponding to a memory location and supplying the adjusted address to the memory address input means; and means for accessing the memory location at the address supplied to the memory address input means. Also provided is a data storage method, and data processing systems including the data storage systems.

Apparatus and method for incrementally accessing a system memory

A method and apparatus is provided for generating an interrupt signal in a data processing system, the interrupt signal being supplied to a control processor of the system to indicate the occurrence of any of a plurality of predetermined events in the system. The method and apparatus operate by: writing data to at least one memory location of a plurality of pairs of memory locations A, B of the system in dependence upon the event to be indicated, the pairs of memory locations A, B being predefined in the system for respective ones of the events; reading data from the pairs of memory locations A, B; processing the data read from each pair of memory locations A, B to generate interrupt data indicative of whether the associated event has occurred, and if so transmitting an interrupt signal to the control processor; and writing the interrupt data corresponding to the events to respective third memory locations C, the third memory locations C being predefined in the control processor. On receipt of an interrupt signal, the control processor reads the interrupt data in the third memory locations C to determine the event indicated by the interrupt signal.

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Charlbury, United Kingdom

Rodney Hugh Densham