Cirrus Logic Inc.

Roderick D Holley

John L Melanson

John Christopher Tucker

Stephen Timothy Hodapp

Anindya Bhattacharya

Sunder S Kidambi

Mohit Sood

Ruoxin Jiang

Jaimin A Mehta

Bala Vishnu Shankar Rao

A data acquisition system may include an input for receiving an input signal for the data acquisition system, a plurality of data paths including a first data path and a second data path, and a signal estimator configured to determine a magnitude of the input signal using estimation of the input signal and dynamically deactivate one of the first and second data paths based on the magnitude of the input signal.

Minimizing power consumption in a data acquisition path

In accordance with embodiments of the present disclosure, an apparatus for measuring acceleration may include a spring-mounted mass, a positional encoder configured to measure a position of the spring-mounted mass and output one or more signals indicative of a sine and a cosine of the position, a driver to set and maintain an oscillation of the spring-mounted mass, and a decoder configured to process the one or more signals to calculate an acceleration of the spring-mounted mass.

Systems and methods for determining acceleration based on phase demodulation of an electrical signal

A system may include a sampling circuit, a temperature calibration system, a phase detector, a virtual phase-locked loop, and a sample rate converter. The sampling circuit may be configured to generate a series of digitally-sampled data at a sampling frequency provided by a local clock. The temperature calibration system may be configured to determine a temperature-based timing compensation with respect to the local clock. The phase detector may be configured to estimate an error of the local clock in view of the reference clock. The virtual phase-locked loop may be configured to generate a virtual clock based on the temperature-based timing compensation and the error. The sample rate converter may be configured to generate a corrected series of digitally-sampled data in response to the virtual clock by interpolating the series of digitally-sampled data to correct for the error.

Systems and methods for clock synchronization in a data acquisition system

A system and method utilize multiple, asynchronous, voltage isolated integrated power data circuits (IPDCs) to respectively determine one or more power parameters of a multi-phase power distribution system. In at least one embodiment, the power parameters represent differences between voltage phases of a multi-phase power distribution system. In at least one embodiment, the IPDCs each sense a voltage or current from a single phase of a three-phase power distribution system. Additionally, the IPDCs are electrically isolated from each other and, thus, in at least one embodiment, can utilize voltage divider or shunt resistor sensing without being subject to high voltages representative of the difference between voltage phases. Additionally, in at least one embodiment, each of the IPDCs utilizes a separate clock signal to determine phase sequence and phase angle deltas of one or more three phase voltages of the three-phase power distribution system.

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Spicewood, TX, United States of America

Roderick D Holley