National Semiconductor Corporation

Robin Shields

Robert A Pease

Shengming Huang

John J Gough

A regulator system includes a power device and a sense device. During a normal operating mode, the power device is arranged to deliver current to a load, while the sense device is arranged to monitor the load current. An over-current mode is activated when the sensed load current exceeds a short-circuit current-limit. During the over-current mode, the power device is switched off such that the energy loss is minimized. Once the short-circuit condition is removed, the regulator system returns to the normal operating mode. The sense device is coupled to the load in such a way that the quiescent current of the regulator system does not rise with increasing load current. The regulator system is further arranged such that the short-circuit current-limit decreases automatically with increased operating temperature. The described regulator system has significantly reduced energy losses while also minimizing risks of thermal induced device failures during the short-circuit condition.

Over-current protection circuit

A protection circuit for a semiconductor switch for switching a load is disclosed. Control circuitry is used for switching the semiconductor switch on in response to a switching signal and for switching the semiconductor switch off in response to a deactivation signal. A deactivation circuit is used for generating the deactivation signal. An overvoltage detector circuit responsive to a voltage at an output of the semiconductor switch that exceeds a predetermined value is used for generating an overvoltage signal. The overvoltage detector circuit includes a Zener diode that has its cathode coupled through a resistor to the output of the semiconductor switch and its anode coupled to the collector of the diode connected transistor. A first logic circuit is used for causing the deactivation circuit to generate the deactivation signal in response to the switching signal and the overvoltage signal. The first logic circuit includes a first npn transistor that has its base coupled through a resistor to receive the switching signal. A second npn transistor receives the overvoltage signal through a resistor at its base. The collector of the first npn transistor is coupled to the collector of the second npn transistor. A third npn transistor has its base coupled to the collector of the second npn transistor. A first pnp transistor has its base coupled to the collector of the third npn transistor. One of the two collectors is coupled to the deactivation circuit.

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Inverclyde, United Kingdom

Robin Shields