Agere Systems Inc.

Robert Y S Huang

Kurt George Steiner

Scott Jessen

Frank Yauchee Hui

Subramanian Karthikeyan

Isaiah O Oladeji

Joseph Ashley Taylor

Joshua Jia Li

A mask layer having four mask films used in the fabrication of an interconnect structure of a semiconductor device. The first mask film and the third mask film have substantially equal etch rates. The second mask film and the fourth have substantially equal etch rates film, and different from that of the etch rate of the first and third mask films. A via is etched to the first mask film. Then a trench is etched to the third mask film of the mask layer. The via and trench are then etched in a dielectric material. The second, third and fourth mask films are removed and the first mask film remains a passivation layer for the dielectric material. A conductive metal is deposited in the via and trench.

Mask layer and dual damascene interconnect structure in a semiconductor device

An apparatus and method for identifying integrated circuit chips or dice on a semiconductor wafer. Each chip comprises a ring oscillator having a characteristic oscillating frequency different from the oscillating frequency of the ring oscillators of other chips on the same wafer. Each chip can be associated with various attributes of the wafer on which it was formed and the process steps to which it was subjected using the ring oscillator frequency.

Method and apparatus using an on-chip ring oscillator for chip identification

Growing community of inventors

Ocoee, FL, United States of America

Robert Y S Huang